EP0517493A2 - Anlaufschaltung für eine integrierte Stromversorgungssteuerschaltung - Google Patents

Anlaufschaltung für eine integrierte Stromversorgungssteuerschaltung Download PDF

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Publication number
EP0517493A2
EP0517493A2 EP92305068A EP92305068A EP0517493A2 EP 0517493 A2 EP0517493 A2 EP 0517493A2 EP 92305068 A EP92305068 A EP 92305068A EP 92305068 A EP92305068 A EP 92305068A EP 0517493 A2 EP0517493 A2 EP 0517493A2
Authority
EP
European Patent Office
Prior art keywords
output
coupled
transistor
input
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP92305068A
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English (en)
French (fr)
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EP0517493A3 (en
EP0517493B1 (de
Inventor
Wilson D. Pace
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
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Motorola Inc
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Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of EP0517493A2 publication Critical patent/EP0517493A2/de
Publication of EP0517493A3 publication Critical patent/EP0517493A3/en
Application granted granted Critical
Publication of EP0517493B1 publication Critical patent/EP0517493B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/1563—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators without using an external clock
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S323/00—Electricity: power supply or regulation systems
    • Y10S323/901—Starting circuits

Definitions

  • This invention relates to circuits, for example, a start circuit for a self-oscillating power supply control integrated circuit.
  • One application for a self-oscillating power supply control circuit is in a boost converter application wherein an input AC signal is converted to an output DC voltage. Further, it is well known that to initiate the operation of the power supply control integrated circuit (IC), a start circuit is required.
  • IC power supply control integrated circuit
  • self-oscillating start circuits for power supply control integrated circuits are external and utilize an external free running oscillator signal that is summed with a current detect signal at one input of the power supply control integrated circuit to initiate power supply operation.
  • this approach requires that an input to the current detect comparator of the power supply control integrated circuit must be properly weighted such that the start signal from the external oscillator does not interfere with normal operation.
  • start circuits are only utilized to initiate the power supply operation and do not monitor the output off time of the power supply upon initiation.
  • external oscillators require additional components which increase the cost of the power supply.
  • a power supply control integrated circuit comprising a first comparator having first and second inputs and an output, the first input being coupled to receive a first voltage signal, the second input being coupled to receive a first reference voltage; a second comparator having first and second inputs and an output, the first input of the second comparator being coupled to receive a second voltage signal, the second input of the second comparator being coupled to receive a second reference voltage; a flip-flop circuit having a plurality of inputs and an output, a portion of the plurality of inputs of the flip-flop circuit being responsive to the outputs of the first and second comparators, the output of the flip-flop circuit providing an output signal of the power supply control integrated circuit; and a timer circuit having an input and an output, the input of the timer circuit being coupled to the output of the flip-flop circuit, the output of the timer circuit being coupled to one of the plurality of inputs of the flip-flop circuit, the timer circuit applying a first logic state to the one of the plurality of inputs of the flip
  • FIG. 1 a partial schematic/block diagram illustrating power supply control integrated circuit 12 in conjunction with external circuitry to form a boost converter circuit is shown.
  • Power supply supply control integrated circuit 12 is responsive external control voltage V CTRL and is coupled to the external circuitry via external pins 14, 16 and 18 .
  • Power supply control integrated circuit 12 includes pulse width modulator comparator 20 having an inverting input coupled to receive control voltage V CTRL , and a non-inverting input coupled to external pin 18. The output of comparator 20 is coupled to a first input of NOR gate 22.
  • Current detect comparator 24 has an inverting input coupled to receive reference voltage V REF and a non-inverting input coupled to external pin 14. The output of comparator 24 is coupled to an input of delay circuit 26 and to a second input of NOR gate 22.
  • the output of delay circuit 26 is coupled to a first input of NOR gate 28, the latter having an output coupled to a third input of NOR gate 22.
  • the output of NOR gate 22 is coupled to a second input of NOR gate 28.
  • the output of NOR gate 22 also provides the output of RS flip-flop 30 which is comprised of NOR gates 22 and 28.
  • RS flip-flop 30 The output of RS flip-flop 30 is coupled to an input of timer circuit 32, the latter having an output coupled to a third input of NOR gate 28.
  • RS flip-flop 30 is coupled to external pin 16 via driver 34.
  • the additional external circuitry includes rectifier circuit 46 responsive to an AC voltage applied across terminal 40 and 42 for providing a rectified AC signal at an output which is coupled to a first terminal of capacitor 48.
  • the second terminal of capacitor 48 is returned to ground.
  • the output of rectifier circuit 46 is also coupled to the drain electrode of field effect transistor (FET) 50 via the primary coil of transformer 52.
  • FET field effect transistor
  • the drain electrode of FET 50 is also coupled to a first terminal of capacitor 54 via diode 56.
  • the first terminal of capacitor 54 is also coupled to terminal 44 at which output voltage V DC is supplied. Further, the second terminal of capacitor 54 is returned to ground.
  • the source electrode of FET 50 is coupled to external pin 18 and to a first terminal of resistor 58.
  • the second terminal of resistor 58 is returned to ground.
  • the gate electrode of FET 50 is coupled to external pin 16.
  • the secondary coil of transformer 52 has a first terminal coupled to external pin 14 and a second terminal returned to ground.
  • the boost converter circuit of FIG. 1 converts an input AC voltage signal applied across terminals 40 and 42 to an output DC voltage signal supplied to terminal 44.
  • control voltage V CTRL may be set to be the product of the rectified AC line voltage and the output DC voltage appearing at terminal 44.
  • RS flip-flop 30 provides a logic high voltage level at its output thereby forcing driver 34 to turn on external FET 50 and allow current to begin flowing through the primary coil of transformer 52, as aforedescribed.
  • Delay circuit 26 is utilized to control RS flip-flop 30 to set the output of RS flip-flop 30 to a logic high voltage level when the output of comparator 24 switches from a logic high voltage level to a logic low voltage level.
  • NOR gate 22 when the output of comparator 24 switches to a logic low voltage level, a logic low voltage level is applied to the second input of NOR gate 22. Subsequently, a delayed logic low voltage level is applied to the first input of NOR gate 28. However, before the logic low voltage level reaches the first input of NOR gate 28, the logic high voltage level that appears at the output of NOR gate 22 is applied to the second input of NOR gate 28. A logic high voltage level at the second input of NOR gate 28 provides a logic low voltage level at the output of NOR gate 28 which is applied to the third input of NOR gate 22. Therefore, assuming that the output of comparator 20 is also a logic low voltage level, the output of NOR gate 22 is a logic high voltage level as desired.
  • delay circuit 26 allows RS flip-flop 30 to be edge sensitive.
  • RS flip-flop 30 in conjunction with delay circuit 26 is designed such that the output of RS flip-flop 30 switches to the proper logic state on the negative edge transition of comparator 24.
  • Timer circuit 32 includes transistor 70 having a base coupled to the input of timer circuit 32.
  • the collector of transistor 70 is coupled to operating potential V CC .
  • the emitter of transistor 70 is coupled to the collector of transistor 72 via resistor 74.
  • the base of transistor 72 is coupled to the collector of transistor 72 and to the base of transistor 76.
  • the emitters of transistors 72 and 76 are returned to ground.
  • the collector of transistor 76 is coupled through current source 78 to operating potential V CC .
  • Timing capacitor 80 is coupled across the collectors of transistors 72 and 76.
  • the collector of transistor 76 is also coupled to the base of transistor 82 where the collector of transistor 82 is coupled to operating potential V CC .
  • the emitter of transistor 82 is coupled to a first terminal of resistor 84 whereby the second terminal of resistor 84 is coupled to provide the output of timer circuit 32.
  • the base of transistor 70 is coupled to the output of RS flip-flop 30 while the second terminal of resistor 84 is coupled to the third input of NOR gate 28.
  • timer circuit 32 monitors the time that the output of RS flip-flop 30 is in a logic low state, and after a predetermined elapsed time, timer circuit 32 provides a logic high voltage level to the third input of NOR gate 28.
  • the logic high voltage level applied to the third input of NOR gate 28 subsequently generates a logic low voltage level at the third input of NOR gate 22.
  • the logic low voltage level applied at the third input of NOR gate 22 generates a logic high voltage level at the output of RS flip-flop 30 thereby turning on FET 50.
  • first and second inputs to NOR gate 22 will be a logic low voltage level if the voltage across resistor 58 is less than control voltage V CTRL , and if there is substantially zero current flowing through transformer 52. Further, it is understood that under normal operation, the time that the output of RS latch 30 is in a logic low state is substantially less than the predetermined elapsed time.
  • transistor 70 when the voltage applied to the base of transistor 70 is a logic low voltage level, transistor 70 is rendered non-operative and supplies substantially zero current to transistor 72.
  • Current source 78 supplies current through timing capacitor 80 and to the collector of transistor 72.
  • the ratio of the emitter area of transistor 76 to the emitter area of transistor 72 is a predetermined ratio, for example, 10:1.
  • a predetermined ratio for example, 10:1.
  • the voltage across timing capacitor 80 increases to a predetermined voltage such that the voltage appearing at the collector of transistor 76 renders transistor 82 operative.
  • a logic high voltage level is supplied to the second terminal of resistor 84.
  • timer circuit 32 monitors the time that the output of RS flip-flop 30 is in a logic low state such that when the time exceeds a predetermined length of time, a logic high voltage level is supplied to the output of timer circuit 32 and, subsequently, to the third input of NOR gate 28. Or equivalently, timer circuit 32 monitors the off-time of FET 50 such that when the off-time exceeds a predetermined length of time, timer circuit 32 initiates the turns on of FET50 and restarts the boost converter circuit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)
EP92305068A 1991-06-03 1992-06-02 Anlaufschaltung für eine integrierte Stromversorgungssteuerschaltung Expired - Lifetime EP0517493B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US709471 1985-03-07
US07/709,471 US5073850A (en) 1991-06-03 1991-06-03 Start circuit for a power supply control integrated circuit

Publications (3)

Publication Number Publication Date
EP0517493A2 true EP0517493A2 (de) 1992-12-09
EP0517493A3 EP0517493A3 (en) 1992-12-30
EP0517493B1 EP0517493B1 (de) 1996-03-13

Family

ID=24850000

Family Applications (1)

Application Number Title Priority Date Filing Date
EP92305068A Expired - Lifetime EP0517493B1 (de) 1991-06-03 1992-06-02 Anlaufschaltung für eine integrierte Stromversorgungssteuerschaltung

Country Status (5)

Country Link
US (1) US5073850A (de)
EP (1) EP0517493B1 (de)
JP (1) JPH0686555A (de)
DE (1) DE69208944T2 (de)
HK (1) HK1002245A1 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995015608A1 (de) * 1993-12-01 1995-06-08 Robert Bosch Gmbh Spannungswandler
WO2004107547A1 (en) * 2003-06-03 2004-12-09 Koninklijke Philips Electronics N.V. Dc-dc-converter

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5153535A (en) * 1989-06-30 1992-10-06 Poget Computer Corporation Power supply and oscillator for a computer system providing automatic selection of supply voltage and frequency
KR960016605B1 (ko) * 1992-11-20 1996-12-16 마쯔시다 덴꼬 가부시끼가이샤 전원 공급 장치
US5514951A (en) * 1994-04-11 1996-05-07 Rockwell International Corporation Supply-discriminating supply-adaptive electronic system
EP0688076B1 (de) * 1994-06-13 1997-11-12 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Leistungsversorgung mit Leistungsfaktorkorrektur und Schutz gegen Ausfallen der Leistungsfaktorkorrektur
US5555166A (en) * 1995-06-06 1996-09-10 Micron Technology, Inc. Self-timing power-up circuit
EP1320919B1 (de) * 2000-09-28 2006-01-18 STMicroelectronics SA Dauerbetriebsbegrenzung in einem schaltnetzteil
TWI258910B (en) * 2005-01-11 2006-07-21 Fortune Semiconductor Corp Undervoltage protection device of coil driving device
JP5513829B2 (ja) 2009-10-01 2014-06-04 パナソニック株式会社 電流駆動回路
US8575853B2 (en) * 2010-01-19 2013-11-05 Ace Power International, Inc. System and method for supplying constant power to luminuous loads
US20110222291A1 (en) * 2010-03-15 2011-09-15 Chunghang Peng Lighting fixture with integrated junction-box
US8324822B2 (en) 2010-08-06 2012-12-04 Ace Power International, Inc. System and method for dimmable constant power light driver
CN102033501B (zh) * 2010-12-01 2012-09-05 中颖电子股份有限公司 单片机的电源控制系统
US8896288B2 (en) * 2011-02-17 2014-11-25 Marvell World Trade Ltd. TRIAC dimmer detection
US9642289B2 (en) 2013-09-19 2017-05-02 Infineon Technologies Austria Ag Power supply and method
CN112865780B (zh) * 2021-01-11 2022-11-11 深圳市康冠商用科技有限公司 具有控制状态存储功能的供电控制电路及监视器

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0244623A2 (de) * 1986-05-05 1987-11-11 Motorola, Inc. Automatische Wiedereinschaltung für ein Schaltnetzteil
EP0377538A2 (de) * 1989-01-06 1990-07-11 Uniphase Corporation Strommoden-Schaltregel mit programmierter Ausschaltzeit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4471327A (en) * 1982-05-20 1984-09-11 Zenith Electronics Corporation Self-oscillating power supply
US4542330A (en) * 1983-10-04 1985-09-17 Hughes Aircraft Company Low input voltage precision DC-to-DC voltage converter circuit
US4806842A (en) * 1988-05-09 1989-02-21 National Semiconductor Corporation Soft start for five pin switching regulators

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0244623A2 (de) * 1986-05-05 1987-11-11 Motorola, Inc. Automatische Wiedereinschaltung für ein Schaltnetzteil
EP0377538A2 (de) * 1989-01-06 1990-07-11 Uniphase Corporation Strommoden-Schaltregel mit programmierter Ausschaltzeit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995015608A1 (de) * 1993-12-01 1995-06-08 Robert Bosch Gmbh Spannungswandler
WO2004107547A1 (en) * 2003-06-03 2004-12-09 Koninklijke Philips Electronics N.V. Dc-dc-converter
US7355373B2 (en) 2003-06-03 2008-04-08 Koninklijke Philips Electronics N.V. DC-DC converter

Also Published As

Publication number Publication date
EP0517493A3 (en) 1992-12-30
EP0517493B1 (de) 1996-03-13
US5073850A (en) 1991-12-17
JPH0686555A (ja) 1994-03-25
DE69208944T2 (de) 1996-10-02
HK1002245A1 (en) 1998-08-07
DE69208944D1 (de) 1996-04-18

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