EP0478382A2 - Verfahren und Einrichtung zum Steuern eines Flüssigkristallanzeigegeräts - Google Patents

Verfahren und Einrichtung zum Steuern eines Flüssigkristallanzeigegeräts Download PDF

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Publication number
EP0478382A2
EP0478382A2 EP91308885A EP91308885A EP0478382A2 EP 0478382 A2 EP0478382 A2 EP 0478382A2 EP 91308885 A EP91308885 A EP 91308885A EP 91308885 A EP91308885 A EP 91308885A EP 0478382 A2 EP0478382 A2 EP 0478382A2
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Prior art keywords
voltage
signal
scanning
picture elements
electrodes
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EP91308885A
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English (en)
French (fr)
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EP0478382A3 (en
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Takaji Numao
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Sharp Corp
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Sharp Corp
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3681—Details of drivers for scan electrodes suitable for passive matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3629—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3644—Control of matrices with row and column drivers using a passive matrix with the matrix divided into sections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/04—Partial updating of the display screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes

Definitions

  • the present invention relates to a driving method and apparatus for liquid crystal display device in which a ferroelectric liquid crystal (hereinafter abbreviated as FLC) is used.
  • FLC ferroelectric liquid crystal
  • Fig. 1 is a cross-sectional view showing a schematic configuration of an FLC panel.
  • Two sheets of glass substrates 5a, 5b are disposed in opposition to each other.
  • a signal electrode S consisting of indium tin oxide(hereinafter abbreviated as ITO) is arranged plurally in parallel on the surface of one glass substrate 5a, and a transparent insulating film 6a consisting of SiO2 is covered thereon.
  • a scanning electrode L consisting of ITO is arranged plurully in parallel in a direction orthogonal to the signal electrode S, and is covered by a transparent insulating film 6b consisting of SiO2 thereon.
  • orientation films 7a, 7b consisting of polyvinyl alcohol and the like and treated by rubbing processing are formed respectively.
  • the two glass substrates 5a, 5b are bonded together with a sealing agent 8 partially leaving an injection port, which is sealed by the sealing agent 8 after an FLC 9 is introduced into a space between the orientation films 7a, 7b by the vacuum injection these through.
  • the two glass substrates 5a, 5b thus bonded together are clamped between two polarizing plates 10a, 10b arranged such that respective polarizing axes intersect orthognally.
  • Fig. 2 and Fig. 3 are plan views showing the configuration of an FLC display (hereinafter abbreviated as FLCD) 1, in which a scanning side driving circuit 11 is connected to the scanning electrode L of the FLC panel having a simple matrix configuration aforementioned, and a signal side driving circuit 12 is connected to the signal electrode S.
  • the scanning side driving circuit 11 is a circuit for applying voltages to the scanning electrodes L
  • the signal side driving circuit 12 is a circuit for applying voltages to the signal electrodes S.
  • a picture element at intersection of any scanning electrode Li and any signal electrode Sj is represented by a symbol Aij.
  • Fig. 4 is a block diagram schematically showing the configuration of display device using the FLCD 1 aforementioned.
  • information necessary for the image display are obtained from digital signals outputted to a CRT display 3 from a personal computer 2, the digital signals are transformed into drive signals for image display on the FLCD 1 in a control circuit 4, thereby the image display is effected on the FLCD 1.
  • Fig. 5 (4) is a waveform diagram showing one horizontal scanning section of the horizontal synchronizing signal HD- which is expanded
  • Fig. 5 (5) is a waveform diagram of one horizontal scanning section of the display data Data which is expanded, index numerals corresponding to the signal electrodes Sj of the FLCD 1
  • Fig. 5 (6) is a waveform diagram showing a data transfer clock CLK for every picture element of the data transfer clock CLK.
  • a driving method of the FLCD 1 is disclosed in Japanese Patent Application Laid Open No. Sho 64-59389 (1989), and a display control method is disclosed in Japanese Patent Application No. Hei 1-342512 (1989).
  • Fig. 6 is a waveform diagram showing an example of respective impressed voltage waveforms to the scanning electrodes L and the signal electrodes S used in a conventional driving method.
  • a waveform shown in Fig. 6 (1) is the waveform of the selective voltage A which is applied to the scanning electrodes L for rewriting the memory state of the picture elements thereon or the luminous state displayed
  • a waveform shown in Fig. 6 (2) is the waveform of a non-selective voltage B which is applied to the other scanning electrodes L for not rewriting the display state of the picture elements on the scanning electrodes L.
  • a waveform shown in Fig. 6 (3) is the waveform of a dark rewriting voltage C which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied into the "dark" luminous state
  • a waveform shown in Fig. 6 (4) is the waveform of a bright voltage D which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied into the "bright” luminous state
  • a waveform shown in Fig. 6 (5) is the waveform of a non-rewriting voltage E which is applied to the signal electrodes S for not rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied.
  • a waveform B-C in Fig. 6 (9) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj
  • waveform B-D in Fig. 6 (10) shows the voltage waveform applied to the picture element Aij when the non-selective voltage B is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj
  • a waveform B-E in Fig. 6 (11) shows the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the non-rewriting voltage E is applied to the signal electrode Sj.
  • the picture elements Aij which are rewritten into the "bright” display state from the "dark” display state are represented by a symbol D responsive to the bright rewriting voltage D, and the picture elements Aij which remain as the "dark” or " bright” display state are represented without any symbol, though it should be represented by a symbol E responsive to the bright non-rewriting voltage E, a displacement state of the entire picture screen may be represented as shown in Fig. 7.
  • Fig. 8 shows respective voltage waveforms applied then to the scanning electrodes L1, L2, L5, signal electrodes S5, S6 and picture elements A15, A16, A25, A56.
  • Fig. 8 (1) shows a waveform of a transfer clock YCK- of the selective signal YI in a shift register in the scanning side driving circuit 11
  • Fig. 8 (2) shows a waveform of the selective signal YI
  • Fig. 8 (3) shows an impressed voltage waveform to the scanning electrode L1
  • Fig. 8 (4) shows an impressed voltage waveform to the scanning electrode L2
  • Fig. 8 (5) shows an impressed voltage waveform to the scanning electrode L5
  • Fig. 8 (6) shows an impressed voltage waveform to the signal electrode S5, Fig.
  • Fig. 8 (7) shows an impressed voltage waveform to the signal electrode S6, Fig. 8 (8) shows an effective voltage waveform applied to the picture element A15, Fig. 8 (9) shows an effective voltage waveform applied to the picture element A16, Fig. 8 (10) shows an effective voltage waveform applied to the picture element A25, and Fig. 8 (11) shows an effective voltage waveform applied to the picture element A56.
  • the voltages applied to the picture elements Aij are substantially equal whether or not the scanning electrode Li is selected, as far as its display state is not rewritten.
  • the scanning electrodes constituting the ferroelectric liquid crystal panel are divided into a plurality of scanning electrode groups, and the selective voltage is applied to the scanning electrodes constituting the scanning electrode groups over two group fields.
  • the signal voltage for changing the picture elements on the selected scanning electrode into the dark display state from the bright display state, or the signal voltage for not changing the bright and dark display states is applied to the signal electrodes.
  • the signal voltage for changing the picture elements on the selected scanning electrode into the bright display state from the dark display state, or the signal voltage for not changing the bright and dark display states is applied to the signal electrodes.
  • the picture elements on the scanning electrodes constituting the scanning electrode group are brought to respond to change to the dark display state from the bright display state, or change to the bright display state from the dark display state, or not to change the bright and dark display states.
  • the difference between the effective voltage waveform applied to the picture element Aij when the selective voltage is applied to the scanning electrode Li and the non-rewriting voltage is applied to the signal electrode Sj, and the effective voltage waveform applied to the picture element Aij when the non-selective voltage is applied to the scanning electrode Li and the dark rewriting voltage or bright rewriting voltage or non-rewriting voltage is applied to the signal electrode Sj is restricted to only a phase shift, and the changes of effective voltage waveform applied to the picture elements is kept lower than the changes of effective voltage waveform due to switching of the combination of the driving voltages corresponding to the two group fields to solve the problems stated above.
  • a display control device of the ferroelectric liquid crystal panel in which, particularly as the display control device for realizing the driving method described in (1), the display control device having a display memory for storing one picture screen of data to be displayed next, a discriminating memory for storing whether or not data in the display memory has changed for every scanning electrode in the lump, and a holding memory for storing one picture screen of the state of picture elements displayed at present on the ferroelectric liquid crystal panel is used, and when storing data to be displayed in the display memory in advance, whether or not the data in the display memory has changed is stored simultaneously in the discriminating memory for every scanning electrode in the lump, and when rewriting the display picture screen of the FLCD, the scanning electrode group including the picture elements in which data to be displayed has changed is known by checking the stored value of the discriminating memory, and by applying the selective voltage to the scanning electrodes constituting the scanning electrode group mainly including the picture elements in which data to be displayed has changed, the time required for applying the selective voltage to a number of scanning electrodes constituting the
  • the flicker may be eliminated if the effects of the picture elements of "dark” or “bright” display state exerted on the transmission light quantity, when applying the voltage Vih to the picture element and the voltage Vkj or Vkh to the picture element are made equal. That is, the voltage Vij may be allotted equally to the voltage Vih and Vkh, and the magnitudes and polarities of the voltage waveforms of the voltage Vih, Vkj and Vkh may be made equal to change phases (used in the driving method disclosed in Japanese Patent Application Laid Open No. Sho 64-59389 (1989)).
  • the driving method capable of applying the dark rewriting voltage C, bright rewriting voltage D and non-rewriting voltage E to the signal electrode, while avoiding the deterioration of the rewriting characteristic and contrast and satisfying the conditions aforementioned can be realized.
  • the non-selective voltage B is applied to the scanning electrode Li and the dark rewriting voltage C, bright rewriting voltage D and non-rewriting voltage E are applied to the signal electrode Sj, and the selective voltage A is applied to the scanning electrode Li for the voltage waveforms B-C, B-D, and B-E applied to the picture element Aij, non-rewriting voltage E is applied to the signal electrode Sj, the luminous variation by the voltage waveform A-E applied to the picture element Aij can be kept smaller than the luminous variation by switching the driving by combination of two sets of voltage waveforms whenever selecting the plural scanning electrodes, and by making the switching period constant above 60 Hz, the driving method without flickers can be realized.
  • the invention is directed to a driving apparatus for the liquid crystal display device, comprising; the liquid crystal display device in which a ferroelectric liquid crystal is interposed between a plurality of scanning electrodes and signal electrodes which are arranged in a direction intersecting each other, and intersecting areas of the scanning electrodes and the signal electrodes are formed into picture elements; a scanning electrode driving circuit in which a selective voltage for rewriting the picture elements on the electrodes is applied to one of the plural scanning electrodes, and a non-selective voltage for not rewriting the picture elements on the electrodes is applied to the remaining scanning electrodes; and a signal electrode driving circuit in which a signal voltage is applied to the signal electrode responsive to data to be displayed by the picture elements on the scanning electrodes to which the selective voltage is applied; the scanning electrode driving circuit dividing the scanning electrodes constituting the liquid crystal display device into a plurality of scanning electrode groups, and applying sequentially the selective voltage to the scanning electrodes constituting the scanning electrode group over the two group fields, the signal electrode driving circuit, in a first group field
  • the invention comprises: a display memory for storing one picture screen of data to be displayed next; a discriminating memory for storing whether or not the data in the display memory has changed for every scanning electrode group in the lump; and a holding memory for storing one picture screen of the state of picture elements displayed, at present, on the liquid crystal display device, and is characterized by, when storing data to be displayed in the display memory in advance, storing simultaneously whether or not the data in the display memory has changed in the discriminating memory for every scanning electrode group in the lump, and in case the display screen is rewritten, checking the scanning electrode group including the picture elements in which data to be displayed has changed in response to the discriminating memory, and applying the selective voltage to the scanning electrode constituting the scanning electrode group including the picture elements in which data to be displayed has changed.
  • the driving method of the display device of the invention it is possible to display without flickers, even when display device having such a high contrast ratio as producing the flickers is used in the driving method disclosed in Japanese Patent Application No. Sho 64-59389 (1989).
  • the display device since variations in display of the display device are exerted on a plurality of adjoining scanning electrodes in many cases, even when the display variations are monitored for every scanning electrode group, the display device having the display speed which is substantially the same as the conventional display control method aforementioned can be realized.
  • Fig. 11 is a block diagram schematically showing a configuration of display device in which a driving method of the invention is applied.
  • the configuration of the display device is schematically same as a conventional display device.
  • Information necessary for image display is obtained from the digital signals outputted to a CRT display 3 from a personal computer 2, the digital signals are transformed into the driving signals for displaying images on an FLCD 20 in a control circuit 22, thereby the image display is effected on the FLCD 20.
  • the digital signals outputted to the control circuit 22 from the personal computer 2 are those shown in Fig. 5 aforementioned.
  • Fig. 1 is a sectional view showing a schematic configuration of an FLC panel.
  • Two sheets of glass substrates 5a and 5b are arranged in opposition to each other.
  • a signal electrode S consisting of indium tin oxide (hereinafter abbreviated as ITO) is arranged plurully in parallel on the surface of one glass substrate 5a, and a transparent insulating film 6a consisting of SiO2 is covered thereon.
  • a scanning electrode L consisting of ITO is arranged plurully in parallel in a direction orthogonal to the signal electrode S, and is covered by a transparent insulating film b thereon.
  • orientation films 7a, 7b consisting of polyvinyl alcohol and the like and treated by rubbing processing are formed respectively.
  • the two glass substrates 5a, 5b are bonded together with a sealing agent 8 leaving partially an injection port, which is sealed by the sealing agent 8 after an FLC 9 is introduced into a space between the orientation films 7a, 7b by the vacuum injection there through.
  • the two glass substrates 5a, 5b thus bonded together are clamped between two polarizing plates 10a, 10b arranged such that respective polarizing axes intersect orthogonally.
  • polyimide treated by rubbing processing is used as the orientation films 7a, 7b, and as a ferroelectric liquid crystal ZLI-4237/000 by Melk Corp. is used.
  • Fig. 12 is a plan view showing a configuration of the FLCD 20, wherein to the scanning electrodes L of the FLC panel of a simple matrix construction abovementioned, a scanning side driving circuit 21 is connected, and to the signal electrodes S, a signal driving circuit 12 is connected.
  • the scanning driving circuit 21 is a circuit for applying the voltage to the scanning electrodes L
  • the signal driving circuit 12 is a circuit for applying the voltage to the signal electrodes S. That is, there is only a difference in configuration of the scanning side driving circuit between the FLCD 20 and the FLCD 1 of Fig. 3.
  • Fig. 13 is a circuit diagram showing a schematic configuration of the scanning driving circuit 21 used in the FLCD 20 stated above.
  • the scanning side driving circuit 21 is constituted by, a shift register consisting of 8 D-type flip-flops (hereinafter abbreviated as D-FF) 30 (two D-FFs are shown in the figure), 8 shift registers (only half-way to the second register is shown in the circuit diagram) consisting of 4 D-FFs 30, 10 NAND gates (only 4 NAND gates are shown in the circuit diagram) 32, and 32 sets of voltage switching analog switches (only 6 2-voltage switching analog switches are shown in the circuit diagram) 31.
  • the scanning side driving circuit 21 is a circuit to which a group selective signal FI, selective signal YI.
  • Fig. 5 is a waveform diagrams of signals outputted to the CRT display 3 from the personal computer 2 stated above.
  • Fig. 5 (1) shows a horizontal synchronizing signal HD- which is outputted to the CRT display 3 and gives one horizontal scanning section period of image information
  • Fig. 5 (2) shows a vertical synchronizing signal VD- which gives one picture screen period of the information
  • Fig. 5 (3) shows the information, as display data Data, for every horizontal scanning section in the lump, index numerals corresponding to the scanning electrodes Li of the FLCD 20.
  • Fig. 5 (4) is a waveform diagram showing one horizontal scanning section of the horizontal synchronizing signal HD- which is expanded
  • Fig. 5 (5) is a waveform diagram showing one horizontal scanning section of the display data Data which is expanded, index numerals corresponding to the signal electrodes Sj of the FLCD 20,
  • Fig. 5 (6) is a waveform diagram showing a data transfer clock CLK for one picture screen of the display data Data.
  • Fig. 14 and Fig. 15 are views showing the voltage waveform combination for realizing the driving method of the invention.
  • Fig. 14 shows the voltage waveform combination which changes the picture elements on the scanning electrode selected, in the first group field, into a dark display state from a bright display state, or does not change the dark and bright display states.
  • a waveform shown in Fig. 14 (1) is the waveform of the selective voltage A which is applied to the scanning electrodes L for rewriting the memory state of the picture elements on the scanning electrodes L or the luminous state displayed
  • a waveform shown in Fig. 14 (2) is the waveform of the non-selective voltage B, which is applied to the other scanning electrodes L for not rewriting the display state of the picture elements on the scanning electrodes L.
  • a waveform shown in Fig. 14 (3) is the waveform of the dark rewriting voltage C, which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied into the "dark" luminous state
  • a waveform shown in Fig. 14 (4) is the waveform of the bright rewriting voltage D, which is applied to the signal electrodes S, and by which the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied can not be rewritten into the "bright” luminous state
  • a waveform shown in Fig. 14 (5) is the waveform of the non-rewriting voltage E which is applied to the signal electrodes S for not rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A is applied.
  • Fig. 14 (6) to Fig. 14 (11) are views showing the waveforms of the effective voltage applied to the picture element Aij.
  • a waveform A-C of Fig. 14 (6) is the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj
  • a waveform A-D of Fig. 14 (7) is the voltage waveform applied to the picture element Aij, when the selective voltage A is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj
  • a waveform B-C of Fig. 14 (9) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the dark rewriting voltage C is applied to the signal electrode Sj
  • a waveform B-D of Fig. 14 (10) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the bright rewriting voltage D is applied to the signal electrode Sj
  • a waveform B-E of Fig. 14 (11) is the voltage waveform applied to the picture element Aij, when the non-selective voltage B is applied to the scanning electrode Li and the non-rewriting voltage E is applied to the signal electrode Sj.
  • Fig. 15 shows the voltage waveform combination which changes the picture elements on the scanning electrodes selected in the second group field to the bright display state from the dark display state, or does not change the bright and dark display states.
  • a waveform shown in Fig. 15 (1) is the waveform of the selective voltage A' which is applied to the scanning electrodes L for rewriting the memory state of the picture elements on the scanning electrodes L or the luminous state displayed
  • a waveform shown in Fig. 15 (2) is the waveform of the non-selective voltage B' which is applied to the other scanning electrodes L for not rewriting the display state of the picture elements on the scanning electrodes L.
  • a waveform shown in Fig. 15 (3) is the waveform of the dark rewriting voltage C' which is applied to the signal electrodes S, and by which the display state of the picture elements on the scanning electrodes L to which the selective voltage A' is applied can not be rewritten
  • a waveform shown in Fig. 15 (4) is the waveform of the bright rewriting voltage D' which is applied to the signal electrodes S for rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A' is applied into the "bright" luminous state
  • a waveform shown in Fig. 15 (5) is the waveform of the non-rewriting voltage E' which is applied to the signal electrodes S for not rewriting the display state of the picture elements on the scanning electrodes L to which the selective voltage A' is applied.
  • Fig. 15 (6) to Fig. 15 (11) show wave forms of the effective voltage applied to the picture element Aij.
  • a waveform A'-C' of Fig. 15 (6) shows the voltage waveform applied to the picture element Aij, when the selective voltage A' is applied to the scanning electrode Li and the dark rewriting voltage C' is applied to the signal electrode Sj
  • a waveform A'-D' of Fig. 15 (7) shows the voltage waveform applied to the picture elements Aij, when the selective voltage A' is applied to the scanning electrode Li and the bright rewriting voltage D' is applied to the signal electrode Sj, a waveform A'-E' of Fig.
  • FIG. 15 shows the voltage waveform applied to the picture element Aij, when the selective voltage A' is applied to the scanning electrode Li and the non-rewriting voltage E' is applied to the signal electrode Sj, a waveform B'-C' of Fig. 15(9) shows the voltage waveform applied to the picture element Aij, when the non-selective voltage B' is applied to the scanning electrode Li and the dark rewriting voltage C' is applied to the signal electrode Sj, a waveform B'-D' of Fig.
  • FIG. 15 (10) shows the voltage waveform applied to the picture elements Aij, when the non-selective voltage B' is applied to the scanning electrode Li and the bright rewriting voltage D' is applied to the signal electrode Sj, and a waveform B'-E' of Fig. 15 (11) shows the voltage waveform applied to the picture element Aij, when the selective voltage B' is applied to the scanning electrode Li and the non-rewriting voltage E' is applied to the signal electrode Sj.
  • the scanning electrodes L1 to L32 are divided into eight sets of scanning electrode groups of L1 to L4, L5 to L8, ..., and L29 to L32, which are designated as the scanning electrode groups "1", "2", ..., and "8".
  • FIG. 16 (2) shows a waveform of the selective signal YI
  • Fig. 16 (3) shows an impressed voltage waveform to the scanning electrode L1
  • Fig. 16 (4) shows an impressed voltage waveform to the scanning electrode L2
  • Fig. 16 (5) shows an impressed voltage waveform to the scanning electrode L5
  • Fig. 16 (6) shows an impressed voltage waveform to the signal electrode S5
  • Fig. 16 (7) shows an impressed voltage waveform to the signal electrode S6,
  • Fig. 16 (8) shows an effective voltage waveform applied to the picture element A15
  • Fig. 16 (9) shows an effective voltage waveform applied to the picture element A16
  • Fig. 16 (10) shows an effective voltage waveform applied to the picture element A25
  • Fig. 16 (11) shows an effective voltage waveform applied to the picture element A56.
  • the voltage applied to the picture element Aij when the scanning electrode Li is selected but the display state is not rewritten is substantially as same as the voltage applied to the picture element Aij when the scanning electrode Li is not selected, the difference between the two is smaller as compared with Fig. 8 wherein the conventional driving method is applied.
  • the difference between the case wherein the voltage waveform combination shown in Fig. 14 or Fig. 15 is continued, and the case of switching from the voltage waveform combination of Fig. 14 to that of Fig. 15, or from the voltage waveform combination of Fig. 15 to that of Fig. 14 is larger than the difference between the two.
  • the drive signal outputted to the FLCD 20 shows the waveforms shown in Fig. 17 and Fig. 18. That is, Fig. 17 (1) and Fig. 18 (1) show a group selective signal FI, which is transferred through a shift register consisting of 8 D-FFs in the scanning side driving circuit 21 by a group clock FCK- shown in Fig. 17 (2) and Fig. 18 (2), and controls the selective signal YI shown in Fig. 17 (3) and Fig. 18 (3) to be inputted in which shift register consisting of 4 D-FFs among the 8 shift registers consisting of 4 D-FFs in the scanning side driving circuit 21.
  • group selective signal FI which is transferred through a shift register consisting of 8 D-FFs in the scanning side driving circuit 21 by a group clock FCK- shown in Fig. 17 (2) and Fig. 18 (2), and controls the selective signal YI shown in Fig. 17 (3) and Fig. 18 (3) to be inputted in which shift register consisting of 4 D-FFs among the 8 shift registers consisting of 4 D-
  • Fig. 17 (4) and Fig. 18 (4) show a scanning side clock YCK-, which transfers the selective signal YI in the shift register selected by the group selective signal FI.
  • Fig. 17 (5) and Fig. 18 (5) show display data DATA corresponding to picture elements of the FLCD 20, Fig. 17 (6) and Fig. 18 (6) show a latch clock LPK- which takes in and holds the display data DATA in a shift register, not shown, included in the signal side driving circuit 12, in a separate register, not shown, included in the same signal side driving circuit 12, Fig. 17 (7) and Fig.
  • FIG. 18 (7) show whether a set of the voltages VCA, VCB, inputted to the scanning electrodes L have the voltage (which are indicated merely as VC in Fig.12,) waveforms A, B or A', B', and Fig. 17 (8) and Fig. 18 (8) are waveform diagrams showing whether a set of the voltages VSC, VSD, VSE, inputted to the signal electrodes S have the voltage (which are indicated merely as VS in Fig. 12,) waveforms C, D, E or C', D'. E'.
  • Fig. 17 (9) is a waveform diagram showing the expanded display data DATA for one selective time
  • Fig. 17 (10) is a waveform diagram showing the expanded latch clock LPK- for one selective time
  • Fig. 17 (11) is a waveform diagram showing a data transfer clock XCK for sequentially transferring the display data DATA in the shift register, not shown, included in the signal side driving circuit 12.
  • Fig. 18 (1) to Fig. 18 (8) show waveforms following the waveforms shown in Fig. 17 (1) to Fig. 17 (8).
  • the display control method for the FLCD having a large number of scanning electrodes if the selective voltage is applied to all scanning electrodes L17 to L32 whose picture element display has not changed. Therefore, in order to carry out the invention, the display control method in which, as same as the conventional display control method, the selective voltage is not applied as much as possible to the scanning electrodes, the display state of picture elements on which do not change, and the display state of the FLCD is rewritten at high speed is required.
  • the discriminating memory 27 stores, in response to the displacement data DF outputted from the display memory 26, whether or not there is even one picture element in which the display data displayed, at present, on the picture elements on the scanning electrodes of the FLCD 20 differs from the display data to be displayed on the next frame, as discrimination data for every scanning electrode group.
  • the discriminating memory 27 for storing the discrimination data for every scanning electrode, 1-bit memory capacity is allocated respectively and discrimination data SAME- is outputted to an output control circuit 24.
  • the holding memory 28 holds one picture screen of display data same as the display data displayed, at present, on the FLCD 20, and after outputting hold data RD to a drive-control circuit 29, stores display data PDX which includes same information as display data DD outputted to the drive-control circuit 29 from the display memory 26.
  • An input control circuit 23 controls, in response to the horizontal synchronizing signal HD-, vertical synchronizing signal VD- and clock CLK outputted from the personal computer 2, the input side operation of the display memory 26, discriminating memory 27 and holding memory 28 directly or indirectly through an input/output switching circuit 25.
  • An output control circuit 24 controls, in response to the discrimination data SAME- outputted from the discriminating memory 27 and an internal clock CK, the output side operation of the display memory 26, discriminating memory 27 and holding memory 28 directly or indirectly through the input/output switching circuit 25, and at the same time, instructs the display position of the display data DATA outputted from the drive control circuit 29 on the FLCO 20.
  • the input/output switching circuit 25 switches, in response to signals of the input control circuit 23 and the output control circuit 24, input/output control signals applied to the display memory 26, discriminating memory 27 and holding memory 28.
  • Fig. 14 and Fig. 15 Specific voltage waveforms of the selective voltage VCA and non-selective voltage VCB applied to the scanning electrodes L, and the dark rewriting voltage VSC, bright rewriting voltage VSD and non-rewriting voltage VSE applied to the signal electrodes S aforementioned are shown in Fig. 14 and Fig. 15, which are formed by switching the voltage waveform combination of Fig. 14 and the voltage waveform combination of Fig. 15 by the voltage waveform switching signal B-/W outputted from the output control circuit 24.
  • Fig. 20 (8) and Fig. 21 (8) are waveform diagrams showing whether the voltages VSC, VSD, VSE applied to the signal electrodes S have the voltage waveforms C, D, E or C', D', E'.
  • Fig. 20 (9) is a waveform diagram showing the expanded display data DATA for one selective time
  • Fig. 20 (10) is a waveform diagram showing the expanded latch clock LPK- for one selective time
  • Fig. 20 (11) is a waveform diagram showing a data transfer clock XCK for sequentially transferring the display data DATA in the shift register, not shown, included in the signal side driving circuit 12.
  • Fig. 21 (1) to Fig. 21 (8) show waveforms following the waveforms shown in Fig. 20 (1) to Fig. 20 (8).
  • the display data Data displaying Japanese characters meaning "ORDINARY DIELELCTRIC” are sent to the display memory 26 from the personal computer 1.
  • displacement data DF of one picture screen which shows the difference between "FERROELECTRIC” and "ORDINARY DIELECTRIC” and as shown by symbols C, D in Fig. 7 are sent to the discriminating memory 27 from the display memory 26.
  • the displacement data DF for one scanning electrode group are lumped together in the discriminating memory 27, and when there is even one data indicated by the symbol "C” or “D” of Fig. 17 in the displacement data DF included in the scanning electrode group, "1" is stored, and when there is none "0” is stored. That is, “1” is stored for the scanning electrode groups L1 to L4, L5 to L8, ..., and L13 to L16, and "0” is stored for the scanning electrode groups L17 to L20, Across and L29 to L32.
  • the waveform diagrams of Fig. 20 and Fig. 21 illustrate the operation thereafter, in which from the output control circuit 24 an output side group address ABx "1" is outputted to the discriminating memory 27 through the input/output switching circuit 25, and at the same time an output side line address ALx "1" and an output side row address ASx "1" are outputted to the display memory 26, and the output side line address ALx "1" and output side row address ASx “1” are outputted to the holding memory 28.
  • the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1" during "1" to "6" of the output side address ASx (this period corresponds to the period during which the display data DATA of Fig.
  • the output side line address ALx is sequentially incremented to "2" to "4", and whenever the output side row address ASx becomes "7" to "10", the display data DD corresponding to the scanning electrodes L2 to L4 are outputted from the display memory 26 to the device control circuit 29, and the hold data RD corresponding to the scanning electrodes L2 to L4 are outputted from the holding memory 28 to the drive control circuit 29.
  • the drive control circuit 29 outputs the "dark rewriting" signal to the signal side driving circuit 12 of the FLCD 20 as display data DATA when the hold data RD is “bright” and the display data DD is “dark”, outputs the "bright rewriting” signal or “non-rewriting” signal as display data DATA when the hold data RD is “dark” and the display data DD is “bright”, and in the other cases outputs the "non-rewriting” signal.
  • Voltage waveforms A, B, C, D, E are outputted from the drive control circuit 29 so as the voltage waveform combination of Fig. 14 corresponds to the display data DATA during this period at the output voltage of the signal side driving circuit 12.
  • the drive control circuit 29 outputs the "dark rewriting" signal or “non-writing” signal to the signal side driving circuit 12 of the FLCD 20 as the display data DATA when the hold data RD is “bright” and the display data DD is “dark”, outputs the "bright rewriting” signal as the display data DATA when the hold data RD is “dark” and the display data DD is “bright”, and in the other cases outputs the "non-rewriting” signal.
  • Voltage waveforms A', B', C'. D', E' are outputted from the drive control circuit 29 so as the voltage waveform combination of Fig. 15 corresponds to the display data DATA during this period at the output voltage of the signal side driving circuit 12.
  • the output side group address ABx "2" is outputted to the discriminating memory 27 from the output control circuit 24 through the input/output switching circuit 25, and at the same time the output side line address ALx "5" and the output side row address ASx "1" are outputted to the display memory 26, and the output side line address ALx "5" and output side row address ASx “1" are outputted to the holding memory 28.
  • the value of discrimination data corresponding to the scanning electrode groups L17 to L20 is "0" as described above, so that when the output side row address ASx is "2", the value of discrimination data corresponding to the scanning electrode groups L17 to L20 of the discriminating memory 27 is held at "0". Then, the output control circuit 24 increments the group address ABx "6", designates the output side line addresses ALx to "21", and when the output side row address ABx is "3". checks whether the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1".
  • the output control circuit 24 increments the group address ABx to "7", designates the output side line address ALx to "25", and when the output side row address ASx is "5", checks again whether the discrimination data SAME- which is the output signal of the discriminating memory is "0" or "1".
  • the output control circuit 24 increments the group address ABx to "8", designates the output side line address ALx to "29", and designates the output side row address ASx as "7", but since the period for checking whether the discrimination data SAME- which is the output signal of the discriminating memory 27 is "0" or "1" is over, the output control circuit 24 holds the group address ABx at "8" as it is.
  • the output side line address ALx is incremented sequentially to "30" to "32", and whenever the output side row address ASx becomes "7" to "10", the display data DD corresponding to the scanning electrodes L30 to L32 are outputted from the display memory 26 to the drive control circuit 29, and from the holding memory 28 the hold data RD corresponding to the scanning electrodes L30 to L32 are outputted to the drive control circuit 29.
  • the drive control circuit 29 outputs the "dark rewriting" signal to the signal side driving circuit 12 of the FLCD 20 as display data DATA when hold data RD is “bright” and display data DD is “dark”, outputs the "bright rewriting” signal or “non-rewriting” signal as display data DATA when hold data RD is “dark” and display data DD is “bright”, and outputs the "non-rewriting” signal in the other cases.
  • Voltage waveforms A', B'. C'. D', E' are outputted from the drive control circuit 29 so as the voltage waveform combination shown in Fig. 14 corresponds to the display data during this period at the output voltage of the signal side driving circuit 12.
  • the output side line address ALx is incremented sequentially to "29" to "32", and whenever the output side row address ASx becomes "7” to "10", the display data DD corresponding to the scanning electrodes L29 to L32 are outputted from the display memory 26 to the drive control circuit 29, and from the holding memory 28 the hold data RD corresponding to the scanning electrodes L29 to L32 are outputted.
  • the drive control circuit 29 outputs the "dark rewriting" signal or “non-rewriting” signal to the signal side driving circuit 12 of the FLCD 20 as display data DATA when hold data RD is “bright” and display data DD is “dark”, outputs the "bright rewriting” signal as display data DATA when hold data RD is “dark” and display data DD is “bright”, and outputs the "non-rewriting” signal in the other cases.
  • Voltage waveforms A', B', C', D', E' are outputted from the drive control circuit 29 so as the voltage waveform combination shown in Fig. 15 corresponds to the display data during this period at the output voltage of the signal side driving circuit 12.
  • the FLCD 20 having the picture elements of 16 x 32 has been referred to for the purpose of simplification, when the display control method of the embodiment aforementioned is applied in a FLCD having the picture elements of 1024 x 1024, in which, actually, 16 adjoining scanning electrodes are used as one scanning electrode group, displays with sufficiently high rewriting speed was realized.
  • the scanning side driving circuit 21 shown in Fig.13 may be constructed so as to decode the output side line address ALx after latching the same, and apply the voltage VCA to the corresponding scanning electrode L.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
EP19910308885 1990-09-27 1991-09-27 Driving method and apparatus for liquid crystal display device Withdrawn EP0478382A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP259988/90 1990-09-27
JP2259988A JPH04134420A (ja) 1990-09-27 1990-09-27 液晶表示装置の駆動方法

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EP0478382A3 EP0478382A3 (en) 1993-03-24

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JP (1) JPH04134420A (de)
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0591683A1 (de) * 1992-09-04 1994-04-13 Canon Kabushiki Kaisha Verfahren und Einrichtung zur Steuerung einer Anzeige
EP0592801A1 (de) * 1992-09-04 1994-04-20 Canon Kabushiki Kaisha Verfahren und Einrichtung zur Steuerung einer Anzeige
EP0596607A1 (de) * 1992-10-08 1994-05-11 Sharp Kabushiki Kaisha Verfahren zur Steuerung einer ferroelektrischen FlüssigKristallanzeigetafel
EP1296311A2 (de) * 2001-09-19 2003-03-26 Optrex Corporation Verfahren zur Steuerung einer Flüssigkristallanzeige
US7106284B2 (en) * 2002-03-29 2006-09-12 Matsushita Electric Industrial Co., Ltd. Liquid crystal display device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007110064A (ja) 2005-09-14 2007-04-26 Ishikawajima Harima Heavy Ind Co Ltd レーザアニール方法及び装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0256879A2 (de) * 1986-08-18 1988-02-24 Canon Kabushiki Kaisha Anzeigevorrichtung
EP0281160A1 (de) * 1987-03-05 1988-09-07 Canon Kabushiki Kaisha Flüssigkristallvorrichtung
EP0306822A2 (de) * 1987-08-31 1989-03-15 Sharp Kabushiki Kaisha Anzeigevorrichtung für ferroelektrische Flüssigkristalle

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0256879A2 (de) * 1986-08-18 1988-02-24 Canon Kabushiki Kaisha Anzeigevorrichtung
EP0281160A1 (de) * 1987-03-05 1988-09-07 Canon Kabushiki Kaisha Flüssigkristallvorrichtung
EP0306822A2 (de) * 1987-08-31 1989-03-15 Sharp Kabushiki Kaisha Anzeigevorrichtung für ferroelektrische Flüssigkristalle

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0591683A1 (de) * 1992-09-04 1994-04-13 Canon Kabushiki Kaisha Verfahren und Einrichtung zur Steuerung einer Anzeige
EP0592801A1 (de) * 1992-09-04 1994-04-20 Canon Kabushiki Kaisha Verfahren und Einrichtung zur Steuerung einer Anzeige
US6075508A (en) * 1992-09-04 2000-06-13 Canon Kabushiki Kaisha Display control apparatus and method therefor
US6157359A (en) * 1992-09-04 2000-12-05 Canon Kabushiki Kaisha Display control apparatus
EP0596607A1 (de) * 1992-10-08 1994-05-11 Sharp Kabushiki Kaisha Verfahren zur Steuerung einer ferroelektrischen FlüssigKristallanzeigetafel
US5477235A (en) * 1992-10-08 1995-12-19 Sharp Kabushiki Kaisha Method for driving a ferroelectric liquid crystal panel
EP1296311A2 (de) * 2001-09-19 2003-03-26 Optrex Corporation Verfahren zur Steuerung einer Flüssigkristallanzeige
EP1296311A3 (de) * 2001-09-19 2003-08-27 Optrex Corporation Verfahren zur Steuerung einer Flüssigkristallanzeige
US6937218B2 (en) 2001-09-19 2005-08-30 Optrex Corporation Method for driving a liquid crystal display device
US7106284B2 (en) * 2002-03-29 2006-09-12 Matsushita Electric Industrial Co., Ltd. Liquid crystal display device

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Publication number Publication date
EP0478382A3 (en) 1993-03-24
TW221314B (de) 1994-02-21
KR920006902A (ko) 1992-04-28
JPH04134420A (ja) 1992-05-08

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