Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q3/00—Selecting arrangements
  • H04Q3/70—Identification of class of calling subscriber

Definitions

• This invention relates to class marking apparatus for use in telephone exchanges.
• An object of the invention is to provide a class marking apparatus for use in telephone exchanges and which provides for more convenient modification of class markings.
• a class marking apparatus for use in telephone exchanges of the kind having means in use generating a call signal indicative that a telephone call is being made on a telephone line with which the exchange is associated, and means providing a line identification signal identifying said telephone line
• said apparatus including first interface means, processing means, memory means and second interface means, said first interface means being effective, in use, to receive said call and line identification signals and to interface said line identification signal to the processing means, said memory means being adapted to store class marking data for subscriber telephone lines, said processing means, on receipt of said call signal, being effective to address said memory means so as to access class marking data relating to said telephone line identified by said identification signal, and said second interface means being effective to receive the accessed class marking data from said processing means and interface said accessed data to the output of said apparatus.
• the first and second interface means may be effective to translate the signals to and from differing magnitudes for processing within - the apparatus.
• the memory means preferably comprises an erasible programmable memory, such as an electronically erasible programmable memory.
• the memory means is provided with third interface means permitting changing of the data stored there within by use of exteriorally generated programming signals.
• the third interface means may, for example, comprise a serial data interface such as an RS232 serial interface to permit coupling of a further microprocessor thereto for changing the data stored in the memory.
• This microprocessor may be permanently coupled to the third interface means, or may be portable.
• FIG. 1 is a block diagram of an apparatus constructed in accordance with the invention
• Figure 2 is a detailed circuit diagram of the apparatus of Figure 1, with Figure 2a being the top left hand corner.
• Figure 2b being the top right hand corner.
• Figure 2c being the bottom left hand corner and
• Figure 2d being the bottom right hand corner of the diagram;
• Figure 3 is a circuit diagram of part of a first interface means forming part of the apparatus of Figure 2;
• Figure 4 is a wave-form diagram illustrating the operation of the first interface means of the apparatus.
• an apparatus 10 constructed in accordance with the invention is shown as including a microprocessor 12.
• the apparatus is adapted to be interconnected into a telephone exchange (not shown) whereby information as to the identification of a subscriber's telephone line is conveyed by a line identification signal on data lines 14 from the exchange whilst initiation of a call on the line so identified is indicated by presence of a call signal on a further line, 16, from the exchange.
• These signals are generated within the exchange in conventional fashion.
• the lines 14 and 16 are connected to a first interface means 18, including input circuit means 20 and four programmable read only memories 22. Output from the PROMS 22 is taken on lines 24 to provide inputs to the microprocessor 12.
• an erasible programmable read only memory 26 which contains programming data for the microprocessor 12 data and an electronically erasible read only memory 28.
• the EEPROM 28 contains data concerning class marking for telephone lines with which the exchange is associated. As explained later, data from this EEPROM 28 is, under supervision of the microprocessor 12, outputted to a second interface means 30 via peripheral interface adaptors 32.
• the apparatus 10 operates to detect a signal condition on line 16 indicative that a call has been made from a subscriber's line and to input into the microprocessor, via the first interface means 18, data from the lines 14 indicative of the particular line on which the incoming call has appeared. These steps are performed under the control of the microprocessor 12. Then, the microprocessor 12 addreses the EEPROM 28 to obtain therefrom data representing the class marking for the particularly identified subscriber line.
• each of these is comprised of ten conductors 42 marked in the drawing with the numerals 1 through 10.
• the conductors within the lines are conditioned in different fashions to identify subscriber line numbers.
• conductors of one line may be arranged to convey units of the subscriber line number, a second to convey tens of units of the subscriber's number and the remaining two to convey hundreds of units of the number.
• the data will be presented on the conductors in a one out of ten (decimal) code.
• the unit "three" in a subscriber's line number may be presented at the first line 14 by placing the third conductor 42 of that line at a particular one of two possible logical states for each conductor.
• the logic states may comprise signal levels of 0 and -50 volt.
• the signal conditioning means 20 is shown as comprising, for the lines 14, sets of signal modifying circuits 40, there being one such circuit 40 associated with the conductors of each of the line 14.
• each circuit includes a Schmit inverter 44 having its input connected via a resistor 46 to the respective conductor 42.
• Each such input is also connected to positive supply via a resistor 48 and to ground via a capacitor 50.
• the operation of the circuit 40 is described with reference to the wave forms of Figure 4.
• an input signal in the form of an input pulse 56 on one of the conductors 42 of a line 14 is shown as being in the form of a pulse which is negative-going and of 50 volt magnitude.
• the resultant pulse produced at the output of the Schmit inverter 44 of that circuit is shown as comprising a positive going pulse 58 of duration corresponding to the duration of 56.
• Pulse 58 is of magnitude 5 volt.
• the pulse begins after a delay " Tp" from the leading edge of pulse 56 and similarly ends at a time " Tp” after the end of pulse 56.
• Tp delay
• the resistors 46, 48 and capacitor 50 serve to effect debouncing and to provide some noise immunity for the circuit.
• the transformation from 50 volt signalling levels to 5 volt signalling levels, as effected by the circuits 40, is to enable the signal information on the lines 14 to be translated for use at the signal levels prevailing within the remainder of the apparatus 10.
• each one of the memories 22 receives data from the set of circuits 40 associated with a particular line 14 and outputs on four lines 70 therefrom at the required binary coded data. These lines are multiplexed and provide to inputs of the microprocessor 12.
• the line 16 which is conditioned to indicate when a call is being made is shown as including two conductors 60, 62, the signal conditions on which change state when a call is detected. Call detection is signalled via one of the PIAs 32 cause an interrupt condition for the microprocessor 12 At that time, conditions of lines 70 are read into the " microprocessor as the identification number for the subscriber's line on which the call has occurred.
• the EEPROM 28 is a standard memory component which is accessed via address, data and control buses.
• the control bus consists of chip enable lines derived from the address decoder 80, and a write enable line derived by "stretching" the read/write line with monostables 37, 39.
• EEPROM 28 contains information concerning call markings appropriate to all or selected ones of the subscriber lines serviced by the exchange with which the apparatus 10 is associated.
• the microprocessor 12 addresses the EEPROM 28 to obtain the relevant classification for the subscriber's line, which is then used to address a look-up table which indicates which outputs the apparatus 10 are to be activated in accordance with the class information which is relevant to that line. This outputting is effected via the PIAs 32 and the second interface device 30.
• the PROM 80 contains a truth table for decoding the 16 bit address bus to provide chip enable "CE" signals for the peripheral components i.e., memory components, the EPROM 26 and EEPROM 28.
• the EPROM 26 contains the program which the microprocessor uses to carry out its functions which include read/write access to the EEPROM 28.
• An octal latch 82 latches a lower order address bus A0-A7 since the latter is multiplexed with a data bus on the same eight lines from the microprocessor 12. This address information is used to address information within PIA's 32 and PROM's 26, 28.
• the interface device 30 is shown as comprising a number of buffer devices 90 each comprising a transistor 92 having its base connected via a resistor 94 to a respective one of the outputs from the relevant PIA the emitter connected to ground and the collector connected via a diode 96 to the relevant output conductor and to negative supply, 50 volts in the described telephone exchange, via diodes 96.
• the output lines for the apparatus 10 are designated generally by reference numeral 98 in Figure 2.
• the lines convey the output information.
• the exact manner in which this coding is effected may be varied as desired in accordance with the requirements of the exchange with which the apparatus is to be used.
• the information output may comprise:
• the originating classifications are output to the exchange on 4 lines AK1-AK4. These represent a particular barring to outgoing calls e.g., barred to ISD.
• the outputs operate relays in the exchange to establish the call progress accordingly.
• the coding on these wires is generally different to the classification store and can be one or more wires active at a time.
• the terminating classifications are output to the exchange on 4 lines BK1-BK4. These represent a particular line condition for calls terminating on that line, e.g., a line may be marked non-meter such that calls to it will not be charged. These outputs operate relays in the exchange to cause the call progress to operate in the above way.
• the special classifications are output on specific wires, e.g., MA which is used to indicate that the call is from an operator or manual exchange. These outputs operate relays in the exchange to cause it to function in the above way.
• the power supply 150 shown for the apparatus is of conventional form.
• the apparatus also includes "watchdog" circuitry 160 which is effective to reset the microprocessor 12 under conditions where the faulty operation would otherwise occur.
• circuits 162, 164 the former being an alarm circuit for the purpose of detecting a faulty output condition and the latter to detect a power failure condition and to ensure that the EEPROM 28 is placed in a condition for power-down storage of data, in order to protect the data stored therein.
• Every customer's telephone line has an allocation of memory in EEPROM 28.
• Each customer can have ' any of the many classifications available stored against this address.
• the format is basically the classification/zone number which is quite different to the information output from the device.
• the EEPROM 28 also contains a prefix table which contains all the prefixes of the directory numbers that are appropriate to the particular exchange. Thus constitutes the classification store data base for every customer of that exchange. The data can be changed at will "on line".
• the customer is first identified in the exchange and his number is presented to the device for processing. This number is used to address EEPROM 28 to retrieve the classifications, which are then used to index a lookup table to decide which outputs to activate.

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• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Exchange Systems With Centralized Control (AREA)

Applications Claiming Priority (4)

Publications (2)

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Family Applications (1)

Country Status (4)

Citations (4)

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• 1989
  • 1989-05-16 EP EP19890905591 patent/EP0422014A4/en not_active Withdrawn
  • 1989-05-16 AU AU35761/89A patent/AU616761B2/en not_active Ceased
  • 1989-05-16 WO PCT/AU1989/000213 patent/WO1989011768A1/en not_active Application Discontinuation
• 1990
  • 1990-11-16 DK DK274290A patent/DK274290A/da not_active Application Discontinuation

Patent Citations (4)

Non-Patent Citations (1)

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