EP0361583A1 - Elektrischer Zünder für ein Geschoss - Google Patents

Elektrischer Zünder für ein Geschoss Download PDF

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Publication number
EP0361583A1
EP0361583A1 EP89202322A EP89202322A EP0361583A1 EP 0361583 A1 EP0361583 A1 EP 0361583A1 EP 89202322 A EP89202322 A EP 89202322A EP 89202322 A EP89202322 A EP 89202322A EP 0361583 A1 EP0361583 A1 EP 0361583A1
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EP
European Patent Office
Prior art keywords
flip
flop
electrical
circuit
pulse counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP89202322A
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German (de)
English (en)
French (fr)
Inventor
Gaston Rubin
Hans Schneider
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Schweizerische Eidgenossenschaft
Original Assignee
Schweizerische Eidgenossenschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schweizerische Eidgenossenschaft filed Critical Schweizerische Eidgenossenschaft
Publication of EP0361583A1 publication Critical patent/EP0361583A1/de
Withdrawn legal-status Critical Current

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Classifications

    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F42—AMMUNITION; BLASTING
    • F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
    • F42C11/00—Electric fuzes
    • F42C11/06—Electric fuzes with time delay by electric circuitry
    • F42C11/065—Programmable electronic delay initiators in projectiles

Definitions

  • the invention relates to an electrical detonator for a projectile with an electrical ignition generator and a capacitor storing the ignition energy, to which an ignition chain with a switch-on element and an electronic circuit arrangement is connected, which monitors and controls the safety of the front pipe, the penetration delay of the projectile and its self-disassembly.
  • An electronic igniter which stores the ignition energy of the generator in a capacitor and compensates for the fluctuations in the consumer current by means of a voltage stabilizer (CH-A5-608 604).
  • Two oscillators with different frequencies are provided to carry out the various functions of the fore-tube security, the self-dismantling and the impact delay, in particular of 500 Hz for the fore-tube security and of 35 kHz for the impact delay.
  • the two oscillators are each connected to a counter and are switched on one after the other, i.e. First of all, the downtube safety and the self-disassembly time are counted down with the first oscillator and afterwards the impact delay is counted down by switching over to the other oscillator and switching off the first oscillator.
  • the circuit of the electronic detonator is a solid-state circuit, i.e. especially designed with CMOS transistors.
  • the above-mentioned electronic detonator allows maximum delay times for downtube security, self-dismantling and impact delay of at most 15 seconds.
  • there is no actual self-disintegration of unexploded ordnance with the circuit described since the self-disintegration there occurs in time between the fore-pipe security and the impact delay is classified.
  • the possible settings for the delay times for projectile ignition are therefore very limited, so that the aforementioned electronic detonator can only be suitable for very specific types of ammunition.
  • the invention is based on the object of providing an electrical detonator which can be used very widely, i.e. is programmable for a large number of different types of ammunition. This means that the electronic circuit of the electric detonator is designed to be particularly energy-saving, so that delay times in the order of minutes can be achieved.
  • this object is achieved in the case of an electrical detonator for a projectile in that a single low-frequency RC oscillator applies a pulse train to a pulse counter, -
  • the pulse counter provides a plurality of the control signals derived from the incoming pulse train at several outputs, and -
  • a programmable logic circuit with a circuit of logic gates by connecting to the associated output of the pulse counter selects a control signal for the pipe safety, a control signal for the penetration delay and a control signal for the self-disassembly and passes it on to a logic switching network for the pyrotechnic trigger mechanism.
  • the invention is based on the fundamental knowledge that the various control signals for the functions of the fore-pipe safety, the penetration delay and the self-decomposition can all be generated by a suitable choice of the oscillator frequency and by frequency division by a single low-frequency RC oscillator and a pulse counter. This allows a particularly power-saving design and a Easy programming of the desired delay signals, as well as high resistance to shocks and vibrations.
  • the preferred oscillator frequency of 300 to 700 Hz, in particular around 500 Hz, is particularly advantageous and energy-saving for an RC oscillator.
  • the design of the pulse counter with D flip-flops according to claim 3 is particularly suitable for a current and space-saving circuit design.
  • the integrated electronic circuit based on CMOS according to claim 5 minimizes the quiescent current, so that the entire circuit arrangement has a very low power consumption and is therefore extremely suitable.
  • the construction of such a CMOS circuit with programmable standard cells according to claim 6 has the great advantage that it is very short Connections are created between the electronic components and thus the power consumption is reduced even further.
  • the input circuit according to claim 7 has a safe control of the ignition element and at the same time a further current reduction.
  • the structure with flip-flop circuits according to claim 8 has proven particularly good in practice.
  • the housing of the electrical detonator according to claim 9 ensures high mechanical stability in the launch acceleration and on impact and can be made very small, in particular in the case of an electrical detonator with a CMOS circuit constructed from standard cells.
  • the special design of the housing according to claim 10 allows the programming of the logic circuit by soldering resistors and / or wire jumpers only at the end of the assembly.
  • - NVZ is the circuit for instantaneous ignition and consists of a NAND flip-flop SR1, two inverters I1 and I2, a driver B1 and a programming switch S1.
  • the entrance S of the NAND flip-flop SR 1 is via the driver B 1 connected to the programming switch S1 and the output Q is fed back with two inverters I 1 and I 2 connected in series, ie connected to the input of driver B 1.
  • the exit Q the NAND flip-flop SR1 connected to an AND gate A2.
  • - PIEZO is the circuit for the piezoelectric ignition contact, ie the impact contact, and consists of a NAND flip-flop SR2, a signal-storing D flip-flop F1, two inverters I3 and I4 and a piezoelectric pulse generator PI.
  • the input of the NAND flip-flop SR2 is connected via the inverter I3 to the piezoelectric pulse generator PI, and the output Q is fed back through the inverter I4, ie connected to the input of the inverter I3.
  • the output Q of the NAND flip-flop SR2 is connected to the input C of the D flip-flop F1, the other input D is always applied with a logic one.
  • the output Q of the D flip-flop F1 is connected via an OR gate O1 with AND gate A2.
  • - ZK is the circuit for the normal ignition contact and consists of a NAND flip-flop SR3, a D flip-flop F2, two inverters I5 and I6, a driver B2 and a contact switch K.
  • the input S the NAND flip-flop SR3 is connected via the driver B2 to the grounding contact switch K, and the output Q is fed back via the two inverters I5 and I6, ie connected to the input of driver B2.
  • the output Q of the NAND flip-flop SR3 is connected to the input C of the D flip-flop F2, whose input D is in turn applied to a logic one.
  • the output Q of the D flip-flop F2 is connected via the OR gate O1 with AND gate A2.
  • - PROG is the circuit for setting the delay times for the front pipe safety, for the penetration delay and for self-dismantling and consists of the two programming switches S2 and S3 with downstream inverters I7 and I8 or I9 and I10.
  • the programming switches S2 and S3 switch to the supply voltage + V.
  • the outputs of the inverters I8 and I10 are connected to the inputs PROG of a pulse counter IZ - described in detail below.
  • - OSZ is the oscillator circuit for generating the correct clock frequency and consists of the drivers B3 and B4, the inverters I11 to I15, the capacitors C1 and C2 and the resistor R1.
  • the inverter I12, the driver B3 and the resistor R1 are connected in series.
  • the inverter I13, the inverter I11 and the capacitor C1 are connected in series, the output of the inverter I11 being connected to ground via the capacitor C2.
  • the inverter I14 and the driver B4 are connected in series. The ends of the branches are connected to one another, the input of the inverter I12 being connected to the output of the inverter I13.
  • the output of the driver B4 is connected to the input of the inverter I13 and another inverter I15, which carries the oscillator signal or the clock frequency to the input OSZ of the pulse counter IZ and to an inverter I23.
  • - RESET is the circuit of the reset of the flip-flop circuits and the pulse counter IZ and consists of an inverter I16 connected to ground, two inverters connected to its output, series-connected inverters I17 and I18, and a charging capacitor C3 at the output of the inverter I16 .
  • the output of the inverter I18 is via an AND gate A1 with the inputs R the NAND flip-flops SR2 and SR3 connected, via a further inverter I19 to the reset inputs R of the D flip-flops F3 to F7 and via an inverter I20 to the input R of the NAND flip-flop SR1.
  • the output of the inverter I19 is also connected via an OR gate O2 to the reset input RESET of the pulse counter IZ.
  • the output VS of the pulse counter which provides the delay signal for the fore-pipe security, is connected to the input C of a D flip-flop F3, the input D of which is supplied with a logic one.
  • the output Q of the D flip-flop F3 is connected to the input D of a further D flip-flop F4 and to an EXOR gate X1.
  • the input C of the D flip-flop F4 is applied via the inverter I23 with the oscillator signal or the clock frequency.
  • the output Q of the D flip-flop F4 is connected to the EXOR gate X1, the output of which is connected via an inverter I21 to the AND gate A1.
  • the output Q of the D flip-flop F4 is connected via an inverter I22 to the reset inputs R of the D flip-flops F1 and F2.
  • the clock frequency inverted after the inverter I23 is also fed to the inputs C of two further D flip-flops F5 and F6, with a driver B5 being interposed before the input C of the D flip-flop F5.
  • the input D of this D flip-flop F5 is connected to the output of the OR gate O1.
  • the output Q of the D flip-flop F5 is connected on the one hand to an EXOR gate X2 and on the other hand to the input D of the D flip-flop F6.
  • the output Q of this D flip-flop F6 is in turn connected to the EXOR gate X2, the output of which is connected to the OR gate O2. Furthermore, the output Q of the D flip-flop F6 is connected to an AND gate A3, which is also connected to the output VERZ of the pulse counter IZ, which provides the delay signal for the intrusion delay.
  • the output of the AND gate A3 is connected to an OR gate O3, which is also connected to the output of the AND gate A2 and to the output SZ of the pulse counter IZ, which provides the signal for self-decomposition.
  • the output of this OR gate O3 is connected to the input C of a signal-storing D flip-flop F7.
  • the output Q of this D flip-flop F7 is applied to an AND gate A4, which is also connected to the output of the inverter I18.
  • the output of the AND gate A4 is connected via a driver B6 to the gate of an ignition thyristor Th, whose anode is connected to a low-resistance ignition element ZE is connected to the supply voltage + V and its cathode is connected to ground.
  • the gate of the thyristor Th is still connected to ground via a resistor R2.
  • FIG. 2 schematically shows the circuit structure of the pulse counter IZ, the inputs PROG, OSZ and RESET and the outputs VS, VERZ and SZ corresponding to the connections in FIG. 1.
  • the two PROG inputs are each connected to an inverter I24 or I25.
  • the upper input PROG is additionally connected to two parallel AND gates A5 and A6, the lower input PROG to the AND gate A5 and a parallel AND gate A7.
  • the output of the inverter I24 is connected to the AND gate A7 and a parallel AND gate A8, and the output of the inverter I25 to the AND gates A6 and A8.
  • the four AND gates A5 to A8 form a first parallel group of AND gates which are connected in series with two further parallel groups of AND gates A9 and A12, or A13 to A16, i.e. AND gate A5 is connected to AND gate A9 and AND gate A13, etc.
  • the actual pulse counter IZ or frequency divider consists of nineteen D flip-flops F10 to F28, which are connected as follows:
  • the input C of the D flip-flop F10 is connected to the oscillator input OSZ.
  • the exit Q is connected on the one hand to its input D and on the other hand to the input C of the subsequent flip-flop F11.
  • the exit Q this D-flip-flop F11 is then connected to its input D and to the input C of the subsequent D-flip-flop F12, etc.
  • the reset inputs R of these D flip-flops F10 to F28 are connected via an inverter I29 and another inverter I26, I27 and I28 to the RESET input of the pulse counter IZ.
  • Selected outputs Q on subsequent D flip-flops are now connected to the inputs of the parallel groups of AND gates A9 to A12 or A13 to A16.
  • the output Q of F14 with A9, of F15 with A12, of F16 with A10, of F17 with A11, and of F22 with A13, of F23 with A14, of F26 with A15 and of F28 with A16 are connected.
  • the outputs of the second group of parallel AND gates A9 to A12 are combined via an OR gate O4 and provide the delay signal VS of the fore-pipe safety.
  • the outputs of the third group of parallel AND gates A13 to A16 are also combined via an OR gate O5 and deliver the self-decomposition signal SZ. Since the penetration delay for the known types of ammunition is always constant - or is realized pyrotechnically with a very short delay time of the order of 0.2 to 0.5 ms - a single time delay is sufficient. Therefore, the output VERZ of the pulse counter IZ is always connected to the output Q of the D flip-flop F17.
  • the oscillator OSZ delivers an oscillator signal at the input of the pulse counter IZ, here a rectangular pulse train with a frequency of 500 Hz, and is applied to the first D flip-flop F10. Due to the special circuit of the D-flip-flops described above, the applied oscillator signal is passed on with a delay, so that when the second D-flip-flop F11 arrives, an oscillator signal with half the frequency, i.e. 250 Hz, applied, etc. The circuit of the D flip-flops therefore also forms a frequency divider.
  • the pulse width of the pulse train at the output of the D flip-flop F14 is 32 msec wide, at F15 64 msec, at F1 F 128 msec, at F17 256 msec, at F22 8 seconds, at F23 16 seconds, at F26 128 seconds and on F28 512 seconds.
  • one of the AND gates A5 to ARIC provides a logical one and the other three AND gates a logical zero, ie that one of the AND gate A9 to A12 supplies a logic one when a positive edge of the square pulse sequence generated by the associated D flip-flop occurs. This generates the desired delay time for the foreline safety at the VZ output.
  • the delay signal of the front pipe security is now stored in the signal-storing D-flip-flop F3, and delayed in the D-flip-flop F4 by 1 msec. These two signals are passed on to the EXOR gate X 1, the output of which outputs a logical one before the delay and a logical zero after the delay.
  • the electromagnetic generator After the projectile has been fired, the electromagnetic generator generates the supply voltage + V, which makes the reset circuit effective.
  • the internal resistance of the inverter I16 results as a pull-up voltage across the capacitor C3, so that it charges.
  • the reset signal is switched off, which applies after a few ⁇ sec.
  • the internal resistance of the inverter I5 acts as a pull-up resistor for the ignition contact switch K. If there is now a short circuit at the switch K (ignition event), the NAND flip-flop SR3 is set via the driver B2 and the signal via its Q output pushed on the D flip-flop F2. As soon as the NAND flip-flop SR3 is set, the inverter I6 is driven via the output Q and the internal resistance or pull-up resistor is inverted by the inverter I5, i.e. to a pulldown resistor. This, however, bridges the short circuit present at the piezoelectric pulse generator PI, i.e. disabled so that no more current flows through the pulse generator PI.
  • This circuit with a pulse-controlled memory element (D flip-flop F2) and a negative feedback control element (NAND flip-flop SR3) therefore causes the positive switching edge of an applied pulse signal to be stored and then the power consumption is reduced.
  • the pulse-controlled control element or D flip-flop F2 also serves to suppress possible transient interference signals.
  • the output signal of the F flip-flop F1 or F2 is now passed through the OR gate O1 to the AND gate A2.
  • the condition for this is that there is a non-reset signal from the inverter I18 at the AND gate A4.
  • the AND gate A2 is blocked by the circuit NVZ, whereby the output signal of the D flip-flop F1 or F2 is applied to the D input of the D flip-flop F5.
  • the input C of this flip-flop F5 is the inverted rectangular pulse train of the oscillator, whereby the Signal at the D input only after a delay of 1 msec. is passed on to the D input of the flip-flop F6.
  • the EXOR gate X2 it is determined whether there is an output signal of a closing device PIEZO or ZK, which then causes the reset of the pulse counter IZ, so that the time delay for, for example, the intrusion delay starts to run again. Is now the delay signal of the output VERZ of the pulse counter IZ and the output signal of the Q output of the flip-flop F7 at the AND gate A3 at the same time, a positive ignition signal is emitted and the ammunition is triggered.
  • the programmable logic circuit with the groups of AND gates can also be constructed with groups of NAND gates.
  • the housing of the electric detonator, together with the pyrotechnic trigger mechanism, has a diameter of 20 mm and a height of 10 mm. It consists of a high-strength, electrically conductive metal alloy, such as Ti Al 6V4, and therefore has excellent protection against external electromagnetic radiation such as electromagnetic or nuclear electromagnetic pulses (EMP or NEMP).
  • the ignition circuit shown in Fig. 1 is housed in its entirety in the housing - with the exception of the piezoelectric pulse generator PI and the ignition contact switch K - and is made with a casting resin of a high-strength plastic, such as with the resin CY 223, the hardener Hy 842 and Microdol as filler (Ciba Geigy), poured into the housing.
  • the electrical detonator manufactured in this way therefore has a very high mechanical stability and easily withstands launch accelerations and impact delays of up to 50,000 g.
  • the reliability of the above electrical detonator with RC oscillator is much greater than that of a conventional detonator with a conventional quartz oscillator.
  • Practical impact tests with an amplitude of 600 g with a rise time of 3 msec. and a similar drop time to 0 g have proven their full functionality in six different positions (regulation MIS-33158E). Vibration tests in three different axial directions were also unable to impair the function of the igniter.
  • the frequency of the sinusoidal vibrations applied was evenly increased from 600 Hz to 900 Hz with a deflection of 0.0254 mm (1/1000 inch). The test duration was 3 minutes and 40 seconds per axis.
  • the frequency was increased uniformly from 40 Hz to 312 Hz with a constant acceleration of 5 g, then simultaneously the frequency was increased uniformly to 1161 Hz and the acceleration to 75 g, and then the Fre frequency evenly increased with constant acceleration from 75 g to 2000 Hz.
  • the test duration was 10 minutes per axis.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Air Bags (AREA)
  • Electronic Switches (AREA)
  • Control Of Direct Current Motors (AREA)
  • Control Of Electric Motors In General (AREA)
EP89202322A 1988-09-30 1989-09-15 Elektrischer Zünder für ein Geschoss Withdrawn EP0361583A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH3641/88A CH676882A5 (enrdf_load_stackoverflow) 1988-09-30 1988-09-30
CH3641/88 1988-09-30

Publications (1)

Publication Number Publication Date
EP0361583A1 true EP0361583A1 (de) 1990-04-04

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ID=4260349

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Application Number Title Priority Date Filing Date
EP89202322A Withdrawn EP0361583A1 (de) 1988-09-30 1989-09-15 Elektrischer Zünder für ein Geschoss

Country Status (4)

Country Link
EP (1) EP0361583A1 (enrdf_load_stackoverflow)
CH (1) CH676882A5 (enrdf_load_stackoverflow)
IL (1) IL91667A0 (enrdf_load_stackoverflow)
NO (1) NO172204C (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5245926A (en) * 1992-03-11 1993-09-21 United States Of America As Represented By The Secretary Of The Army Generic electronic safe and arm
EP1306644A3 (de) * 2001-10-25 2003-07-16 Rheinmetall Landsysteme GmbH Verfahren zur Temperierung einer Munitionseinheit sowie temperierbare Munitionseinheit
US6823767B2 (en) 2001-10-24 2004-11-30 Rheinmetall Landsysteme Gmbh Method for fuze-timing an ammunition unit, and fuze-timable ammunition unit

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1605376A (enrdf_load_stackoverflow) * 1964-03-21 1975-02-28
US3955069A (en) * 1972-09-28 1976-05-04 General Electric Company Presettable counter
GB1493104A (en) * 1973-05-19 1977-11-23 Ferranti Ltd Projectile fuses
EP0057296A2 (de) * 1981-01-30 1982-08-11 Werkzeugmaschinenfabrik Oerlikon-Bührle AG Aufschlagzünder mit flugzeitabhängiger Verzögerung
EP0100130A2 (en) * 1982-07-27 1984-02-08 Motorola, Inc. Fuze actuating system having a variable impact delay
US4586437A (en) * 1984-04-18 1986-05-06 Asahi Kasei Kogyo Kabushiki Kaisha Electronic delay detonator
FR2574922A1 (fr) * 1984-12-18 1986-06-20 France Etat Armement Fusee a retard programmable pour mise a feu d'elements pyrotechniques
US4633779A (en) * 1984-06-29 1987-01-06 Motorola, Inc. Timing apparatus for a fuse

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1605376A (enrdf_load_stackoverflow) * 1964-03-21 1975-02-28
US3955069A (en) * 1972-09-28 1976-05-04 General Electric Company Presettable counter
GB1493104A (en) * 1973-05-19 1977-11-23 Ferranti Ltd Projectile fuses
EP0057296A2 (de) * 1981-01-30 1982-08-11 Werkzeugmaschinenfabrik Oerlikon-Bührle AG Aufschlagzünder mit flugzeitabhängiger Verzögerung
EP0100130A2 (en) * 1982-07-27 1984-02-08 Motorola, Inc. Fuze actuating system having a variable impact delay
US4586437A (en) * 1984-04-18 1986-05-06 Asahi Kasei Kogyo Kabushiki Kaisha Electronic delay detonator
US4633779A (en) * 1984-06-29 1987-01-06 Motorola, Inc. Timing apparatus for a fuse
FR2574922A1 (fr) * 1984-12-18 1986-06-20 France Etat Armement Fusee a retard programmable pour mise a feu d'elements pyrotechniques

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5245926A (en) * 1992-03-11 1993-09-21 United States Of America As Represented By The Secretary Of The Army Generic electronic safe and arm
US6823767B2 (en) 2001-10-24 2004-11-30 Rheinmetall Landsysteme Gmbh Method for fuze-timing an ammunition unit, and fuze-timable ammunition unit
EP1306644A3 (de) * 2001-10-25 2003-07-16 Rheinmetall Landsysteme GmbH Verfahren zur Temperierung einer Munitionseinheit sowie temperierbare Munitionseinheit

Also Published As

Publication number Publication date
CH676882A5 (enrdf_load_stackoverflow) 1991-03-15
IL91667A0 (en) 1990-04-29
NO172204B (no) 1993-03-08
NO172204C (no) 1993-06-16
NO893860D0 (no) 1989-09-28
NO893860L (no) 1990-04-02

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