EP0275217B1 - Photovoltaischer Wandler - Google Patents

Photovoltaischer Wandler Download PDF

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Publication number
EP0275217B1
EP0275217B1 EP88300346A EP88300346A EP0275217B1 EP 0275217 B1 EP0275217 B1 EP 0275217B1 EP 88300346 A EP88300346 A EP 88300346A EP 88300346 A EP88300346 A EP 88300346A EP 0275217 B1 EP0275217 B1 EP 0275217B1
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EP
European Patent Office
Prior art keywords
light
signal
photosensors
excess carriers
dark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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EP88300346A
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English (en)
French (fr)
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EP0275217A2 (de
EP0275217A3 (de
Inventor
Shigetoshi Sugawa
Nobuyoshi Tanaka
Yoshio Nakamura
Isamu Ueno
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Canon Inc
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Canon Inc
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Publication date
Priority claimed from JP62006255A external-priority patent/JPH0628412B2/ja
Priority claimed from JP62006252A external-priority patent/JPH0682819B2/ja
Priority claimed from JP62077951A external-priority patent/JPH0724301B2/ja
Application filed by Canon Inc filed Critical Canon Inc
Publication of EP0275217A2 publication Critical patent/EP0275217A2/de
Publication of EP0275217A3 publication Critical patent/EP0275217A3/de
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Publication of EP0275217B1 publication Critical patent/EP0275217B1/de
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/14Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
    • H04N3/15Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation
    • H04N3/155Control of the image-sensor operation, e.g. image processing within the image-sensor
    • H04N3/1568Control of the image-sensor operation, e.g. image processing within the image-sensor for disturbance correction or prevention within the image-sensor, e.g. biasing, blooming, smearing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14681Bipolar transistor imagers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/62Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
    • H04N25/625Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels for the control of smear
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/701Line sensors

Definitions

  • the present invention relates to a photoelectric converting apparatus having a plurality of photosensors which are divided into a light receiving portion and a light shielded portion.
  • Fig. 1 is a schematic constitutional diagram of a conventional photoelectric converting apparatus having the dark output compensating function.
  • a sensor section 1 comprises cells S 1 to S n in the light receiving portion to perform the photoelectric conversion and a cell S d in the light shielded portion to obtain a dark reference output.
  • Signals of the cells are sequentially output by a scan section 2 and input to a dark output compensation section 3.
  • the dark output compensation section 3 subtracts a dark reference signal amount of the cell S d from the signals of the cells S 1 to S n and outputs.
  • the output of the sensor cell S d in the light shielded portion corresponds to a dark current of the sensor cell, by subtracting the dark reference signal amount of the cell S d from the signals of the cells S 1 to S n , the noise components by the dark current are eliminated.
  • the photoelectric conversion signal which accurately corresponds to the incident light can be derived.
  • a clamping circuit can be used as the dark output compensation section 3, or it is also possible to use a sample and hold circuit to hold the dark reference signal of the cell S d and a difference circuit to obtain the differences between the dark reference signal and the signals of the cells S 1 to S n .
  • Fig. 2 is a schematic cross sectional view of the sensor section 1 in the foregoing conventional apparatus.
  • the sensor cells S d and S 1 to S n are formed in a line in an n - layer 701 with device separating regions 702.
  • Each cell has a p region 703 to accumulate the carriers generated by the light excitation.
  • a light shielding film 704 is formed on the cell S d , thereby constituting a light shielded portion.
  • the foregoing conventional photoelectric converting apparatus has a problem such that when the strong light enters the light receiving portion, the carriers leak from the light receiving portion to the light shielded portion and exert an adverse influence on the dark reference output.
  • a base storage type photosensor is known from EP-A-0132076.
  • a photosensor device having a light shielded portion is known from US-A-4293877.
  • US-A-4300163 proposes a solid-state imaging apparatus in which an imaging unit has a light receiving section comprising a two-dimensional array of photodiodes, and a light shielded section comprising a single line of optically-shielded photodiodes. It is proposed that in place of the one line or row of the optically-shielded photodiode array as illustrated in US-A-4300163, two lines of shielded photodiode arrays may be arranged in the case of interlace scanning.
  • An embodiment of the invention provides a photoelectric converting apparatus in which the signals of photosensors in the light receiving portion are not mixed into the dark reference signal from the light shielded portion.
  • the leakage of the photosignals from the light receiving portion is blocked and a dark signal output can be derived from the dark signal sensor in the light shielded portion which is not influenced by the light.
  • Fig. 3 is a schematic cross sectional view of an embodiment of a photoelectric converting apparatus according to the invention.
  • Fig. 4 is a cross sectional view taken along the line A-A in Fig. 3.
  • an n - layer is formed on an n type substrate 101 by an epitaxial growth.
  • the cells S d , S 1 , S 2 , ..., S n and an excess carrier eliminating cell S f are formed in a line in the n - layer so as to be separated from each other by device separating regions 116.
  • the excess carrier eliminating cell S f is located between the cell S d and the cell S 1 .
  • the n - layer serves as a collector region 102 in each cell.
  • a p base region 103 is formed in each cell.
  • An n + emitter region 104 is formed in each p base region 103.
  • an npn type bipolar transistor is formed.
  • a p + region 105 is formed in the p base region 103.
  • a p + region 106 is formed in the n - layer 102 at a constant distance.
  • a gate electrode 108 is formed through an oxide film 107.
  • a reset Tr a p channel MOS transistor for resetting
  • the reset Tr may be obviously replaced by an n channel MOS transistor.
  • An insulative film 109 is formed on the bipolar transistor and reset Tr.
  • An electrode 110 joined to the p + region 106 and an emitter electrode 111 joined to the n + emitter region 104 are formed, respectively.
  • an insulative film 112 is formed on the insulative film 109.
  • the portion excluding the light receiving portion is covered by a light shielding film 113.
  • the light shielding film 113 is formed over the cells S d and S f , thereby constituting the light shielded portion.
  • the other cells S 1 to S n constitute the light receiving portion.
  • a collector electrode 114 is formed on the back surface of the substrate 101.
  • the incident light is converted into the electric signals by the cells S 1 to S n .
  • a dark reference signal for dark output compensation is derived from the cell S d .
  • the inflow of the excess carriers to the dark reference cell S d is blocked by the cell S f formed between the light receiving portion and the cell S d .
  • the p base region 103 in the excess carrier eliminating cell S f in the embodiment is fixed to a potential V fx of a collector potential V cc or less. Therefore, even if the excess holes accumulated in the p base region 103 of the cells S 1 to S n overflowed, they are attracted to the p base region 103 of the cell S f and do not reach the dark reference cell S d . Namely, even if the strong light had entered the photoelectric converting cells in the light receiving portion and the excess carriers flowed out from the p base region 103 to the collector side, the correct dark reference output can be always obtained from the dark reference cell S d .
  • the excess carrier eliminating cell S f has the same constitution as those of the other cells, any special manufacturing process is unnecessary to form the cell S f .
  • this embodiment is also advantageous with respect to noise.
  • the invention can be obviously easily applied to a photoelectric converting cell using a field effect transistor, an electrostatic induction transistor, or the like which has a region to accumulate the carriers.
  • Fig. 5A is an equivalent circuit diagram for explaining the fundamental operation of the foregoing photoelectric converting cell.
  • Fig. 5B is a voltage waveform diagram showing the operation of the circuit of Fig. 5A.
  • the photoelectric converting cell is equivalent to a circuit in which the p base region 103 of the npn type bipolar transistor is connected to a drain of a reset Tr 5.
  • a pulse ⁇ res is input to the gate electrode 108 of the reset Tr 5.
  • a constant voltage V bg e.g., 2 V
  • the emitter electrode 111 is connected to a terminal 115 through an n channel MOS transistor 8.
  • a pulse ⁇ vrs is input to a gate electrode of the transistor 8.
  • a voltage which is sufficiently lower than the voltage V bg or an earth voltage is properly applied to the terminal 115.
  • a potential V b of the p base region 103 is set into a floating state at an initial positive potential and the emitter region 104 is set into a floating state at the zero potential, respectively.
  • the positive voltage V cc is applied to the collector electrode 114.
  • the gate electrode 108 of the reset Tr 5 is set to a positive potential.
  • the reset Tr 5 is set to the OFF state.
  • the reading operation is executed simultaneously with the accumulation operation.
  • the reset Tr 5 since the negative voltage pulse ⁇ res is first applied to the gate electrode 108 of the reset Tr 5, the reset Tr 5 is turned on (for a period of time T 1 ).
  • the potential V b of the p base region 103 is set to the constant voltage V bg irrespective of the voltage which has been accumulated so far, i.e., independently of the illumination of the incident light.
  • the constant voltage V bg is set to a value which is sufficiently higher than a base residual potential V k after completion of the carrier extinguishing operation.
  • V bg 2V.
  • the transistor 8 is turned on by the positive voltage pulse ⁇ vrs .
  • the earth voltage at the terminal 115 or a voltage sufficiently lower than V bg is applied to the emitter electrode 111 through the transistor 8 (for a period of time T 2 ').
  • the positive voltage pulse ⁇ vrs can be also obviously applied earlier so as to be present continuously after the leading (falling) edge of the pulse ⁇ res (for a period of time T 2 ).
  • the holes accumulated in the p base region 103 are recombined with the electrons injected from the n + emitter region 104 into the p base region 103, so that the holes are extinguished.
  • the potential V b of the p base region 103 is set to the potential V bg which is sufficiently higher than the residual potential V k irrespective of the accumulated potential for the period of time T 1 . Therefore, after the elapse of the period of time T 2 or T 2 ', the potential V b of the p base region 103 is set to the constant potential V k independently of the intensity of the illuminance.
  • the pulse ⁇ vrs ends to turn off the transistor 8, so that the emitter electrode 111 is set into the floating state.
  • the operation mode enters the foregoing accumulation or readout operation.
  • the potential V b of the p base region 103 can be set to the constant value V k at the end of the extinguishing operation for the period of time T 2 or T 2 '. Therefore, the non-linearity of the photoelectric converting characteristics and the after image phenomenon when the illuminance is low can be completely prevented.
  • the potential of the p base region 103 is not controlled by a capacitor, reduction and variation in output due to the capacitor do not occur.
  • Fig. 6 is a schematic circuit diagram of the embodiment using the foregoing photoelectric converting cells.
  • the cells S d , S f , and S 1 to S n in the embodiment are arranged in a line as shown in Fig. 3.
  • the gate electrode 108 of the reset Tr 5 of each of cells S d and S 1 to S n is commonly connected to a terminal 70.
  • a pulse ⁇ res is input to the terminal 70.
  • the source electrodes 110 are commonly connected to a terminal 72.
  • the voltage V bg is applied to the terminal 72.
  • the potential of the p base region 103 of the excess carrier eliminating cell S f is fixed to V fx .
  • the reset Tr 5 is always held in the ON state and the voltage V fx is applied to the source electrode 110.
  • an electrode is directly connected to the p base region 103 and the voltage V fx is applied to this electrode.
  • the emitter electrodes 111 of the respective cells are connected to the ground through the transistor 8.
  • the gate electrodes of the transistors 8 are commonly connected to the terminal 71.
  • the pulse ⁇ vrs is input to the terminal 71.
  • each cell is connected to a capacitor C t for accumulation through a transistor 11.
  • Each capacitor C t is commonly connected to an output line 20 through each transistor 12.
  • a gate electrode of each transistor 11 is commonly connected to a terminal 73.
  • a pulse ⁇ t is input to the terminal 73.
  • a gate electrode of the transistor 12 is connected to an output terminal of a shift register 13.
  • the transistors 12 are sequentially turned on by the shift register 13.
  • the shift register 13 is made operative by a shift pulse ⁇ sh which is input from a terminal 79 and the high level position is successively shifted.
  • the output line 20 is connected to an output terminal 76 through an output amplifier 15.
  • An input of the output amplifier 15 is connected to a terminal 74 through a transistor 14.
  • the constant voltage V bh is applied to the terminal 74.
  • a pulse ⁇ hrs is input to a gate electrode 75 of the transistor 14.
  • Each of the foregoing pulses ⁇ , and the constant voltages V bg , V fx , and V bh are supplied from a driver 77.
  • the driver 77 outputs each pulse at the timing responsive to a clock signal from an oscillator 78.
  • Fig. 7 is a timing chart showing an example for the timings of the respective pulses which are output from the driver 77.
  • ⁇ t(A) and ⁇ t(B) represent timings for different reading methods.
  • the transistor 11 since the ⁇ t is at the high level, the transistor 11 is in the ON state and the charges in the capacitor C t are eliminated through the transistors 11 and 8.
  • the emitter electrode 111 of each cell is connected to the capacitor C t through the transistor 11.
  • the foregoing accumulation and readout operations are executed until the ⁇ t falls at time t 6 . Namely, as the carriers excited by the light in the cells S 1 to S n are accumulated in the base, the carriers corresponding to the accumulated amount are then accumulated into the capacitors C t , respectively. At this time, even if the excess carriers flowed out from the base to the collector side by the strong light, they are attracted to the p base region of the excess carrier eliminating cell S f and do not reach the dark reference cell S d .
  • the transistors 11 When the ⁇ t falls at time t 6 , the transistors 11 are turned off and the signals photoelectrically converted in the cells S 1 to S n and the dark reference signal of the dark reference cell S d are accumulated and stored into the capacitors C t , respectively. Although the output from the cell S f is also accumulated into the capacitors C t , this output is ignored at the following stage in this embodiment.
  • the transistor 14 is turned on, thereby eliminating the charges remaining in the stray capacitance of the output line 20.
  • the above-mentioned signal take-out operations are successively executed at the timings of the shift pulses ⁇ sh with respect to the cells S d to S n .
  • the signals photoelectrically converted for the time interval from time t 4 to time t 6 and the dark reference signal can be sequentially output.
  • the readout operations in the case of the ⁇ t(B) are the further improved operations of those in the case of the ⁇ t(A) .
  • the ⁇ t is set to the low level for the period of time from t 4 to t 5 .
  • the carriers generated in the base of each cell due to the light excitation are accumulated into each cell without being accumulated into the capacitor C t .
  • the signals which were accumulated in the cells are respectively transferred to the capacitors C t by the ⁇ t in the period of time from t 5 to t 6 . According to this method, it has been confirmed by the experiments that the output level was improved by 20 to 30 % and the variation in sensitivity was also remarkably reduced as compared with those in the case of the ⁇ t(A) .
  • the ⁇ vrs has been set to the high level for the period of time from t 1 to t 3 , it can be also set to the low level. In such a case, there are effects such that the current flowing between the base and the emitter of the cell can be cut out for the period of time from t 1 to t 3 and the electric power consumption is reduced.
  • each signal of the cells S d , S f , and S 1 to S n is serially output as an output signal V out from the terminal 76 of the amplifier 15 to the outside.
  • the noise components by the dark current are eliminated by the dark output compensation section 3 described in Fig. 1. In this case, the output of the cell S f is ignored in the dark output compensation section 3.
  • the photoelectric converting apparatus by providing the carrier eliminating means between the cells S 1 to S n of the light receiving portion and the cell S d of the light shielded portion, the leakage of the photosignals from the light receiving portion is blocked and an output which is not adversely influenced by the light can be obtained from the sensor in the light shielding portion.
  • the correct dark reference signal can be obtained from the sensor in the light shielded portion.
  • the accurate dark output compensation of the photoelectric conversion output, peak detection output, or the like can be executed.
  • Fig. 8 is a schematic circuit diagram of the photosensors S 1 to S n in photoelectric converting apparatus as shown in Figs. 1 to 7 in a second embodiment of the invention.
  • a sensor section 201 is constituted by arranging a plurality of photosensors in a line or like an area as shown in Fig. 1.
  • the sensor section 201 comprises the n photosensors S 1 to S n arranged in a line.
  • the light shielded photocells S d and S f are not shown. It is desirable that the photosensor having two or more output terminals of the readout signal is used.
  • the readout signals of the photosensors are sequentially taken out by a scan section 202 and output as signals V out to the outside through an amplifier 203.
  • the output terminals of the sensors are connected to a common line 204 through switching transistors. Every three of gate electrodes of the switching transistors are commonly connected.
  • Transistor groups Q 1 to Q m are constituted as examples of selecting means. It is obviously possible to constitute the transistor groups by commonly connecting a desired number of gate electrodes.
  • each of the transistor groups Q 1 to Q m are commonly connected, respectively. By inputting selection pulses ⁇ 1 to ⁇ m , each transistor group is turned on or off.
  • a detection signal of the peak value, mean value, or the like appearing on the common line 204 is transmitted through an amplifier 205 and output as a signal V de to a gain control circuit or the like.
  • a desired transistor group can be turned on by the selection pulses ⁇ 1 to ⁇ m and the photosensors in a desired portion can be used to measure the light. For example, by setting the pulses ⁇ 1 and ⁇ 2 to the high level to turn on only the transistor groups Q 1 and Q 2 , the peak value or mean value can be detected by the readout signals of the photosensors S 1 to S 6 .
  • the sensor section 201 in the embodiment is not limited to the line sensor.
  • the invention can be also similarly applied to an area sensor with a constitution such that a plurality of line sensors are arranged.
  • each section of the photosensors S 1 to S n in the sensor section 201 corresponds to each column in the area and comprises a plurality of photosensors.
  • Fig. 9 is a schematic cross sectional view of an example of the photoelectric converting cells.
  • n + emitter region 104 and an n + emitter region 104a are formed in the p base region 103, thereby constituting an npn type bipolar transistor of a double emitter structure.
  • An emitter electrode 111a is formed in correspondence to the emitter region 104a.
  • the photoelectric converting cell can also use for instance a field effect transistor or an electrostatic induction transistor.
  • Fig. 10 is an equivalent circuit diagram for explaining the fundamental operation of the foregoing photoelectric converting cell and differs from Fig. 5A with respect to only a point that the cell in Fig. 10 has the emitter electrode 111a.
  • the drive voltages are similar to those in Fig. 5B.
  • Fig. 11 is a schematic circuit diagram in the third embodiment of the invention using the foregoing photoelectric converting cells and the same parts and components as those shown in Fig. 6 are designated by the same reference numerals.
  • the emitter electrodes 111a of the cells are connected to the common line 204 through the transistor groups Q 1 to Q m each consisting of two transistors. Selection pulses ⁇ p1 to ⁇ pm are input to the gate electrodes of the transistor groups, thereby turning on or off each transistor group.
  • the common line 204 is connected to the input terminal of the amplifier 205 and is also connected to the ground through a transistor 206 for resetting.
  • a pulse ⁇ cp is input to the transistor 206.
  • Fig. 12 is a timing chart showing an example of the timings for the respective pulses which are output from the driver 77.
  • the case where the cells S 1 and S 2 were selected for peak detection will be described.
  • the cells can be easily selected by the selection pulses ⁇ p1 to ⁇ pm .
  • ⁇ t(A) and ⁇ t(B) denote the timings for the different reading methods, respectively.
  • the transistor 11 since the ⁇ t is at the high level, the transistor 11 is in the ON state. The charges in the capacitor C t are eliminated through the transistors 11 and 8.
  • the selection pulse ⁇ p1 is held at the high level and the ⁇ vrs , ⁇ p2 to ⁇ pm , and ⁇ cp are set to the low level at time t 4 .
  • the emitter electrode 111 of each cell is connected to the capacitor C t through the transistor 11 and at the same time, only the emitter electrodes 111a of the selected cells S 1 and S 2 are connected to the common line 204 through the transistor group Q 1 .
  • the foregoing accumulation and readout operations are executed until the ⁇ t falls at time t 6 . Namely, as the carriers generated in the cells S 1 to S n by the light excitation are accumulated in the base, the carriers as many as the accumulated amount are accumulated into the capacitors C t , respectively.
  • the peak value of the readout signals of the cells S 1 and S 2 appears on the common line 204 and is output as a peak output V pk through the amplifier 205.
  • the peak output V pk is input to the gain control circuit and used to adjust the gain when the output signal V out is processed.
  • the peak output V pk is also input to a control circuit and used to adjust the accumulation periods of the cells S 1 to S n .
  • the transistor 14 is turned on, thereby eliminating the charges remaining in the stray capacitance of the output line 20.
  • the foregoing signal take-out operations are sequentially executed at the timings of the shift pulses ⁇ sh with respect to the cells S 1 to S n .
  • the signals photoelectrically converted for the time interval from t 4 to t 6 are successively output as the output signals V out to the outside.
  • the carrier extinguishing operation for the period of time from t 1 to t 4 the accumulation, readout, and peak value detecting operations for the period of time from t 4 to t 6 , and the signal take-out operation after time t 7 are again repeated in accordance with this order.
  • the peak value can be detected in a real time manner by use of the readout signals of the cells which were arbitrarily selected.
  • the cells can be also easily selected by the selection pulses ⁇ p1 to ⁇ pm .
  • the readout operations in the case of the ⁇ t(B) are the further improved operations of those in the case of the ⁇ t(A) and are substantially similar to those described in the timing chart shown in Fig. 7. Therefore, their detailed descriptions are omitted.
  • the signals of the cells S 1 to S n are serially output as the output signals V out from the terminal 76 of the amplifier 15 to the outside.
  • the mean value of the readout signals from the selected cells appears on the common line 204.
  • the selecting means which can select the photosensors in a desired portion
  • the sensor section to perform the light measurement such as peak value detection, mean value detection, or the like
  • the optimum peak value, mean value, or the like adapted to process the readout signals can be derived.

Claims (10)

  1. Photoelektrische Wandlervorrichtung mit
    einem Halbleiter-Photosensorteil, das einen Lichtempfangsabschnitt mit einer Vielzahl von Lichtsignalsensoren (S1 bis Sn) zur Erzeugung von Signalen entsprechend auffallendem Licht und einen gegen Licht abgeschirmten Abschnitt mit einem Dunkelsignalphotosensor (Sd) zur Erzeugung eines Dunkelreferenzsignals aufweist, und
    einer Einrichtung (3) zur Kompensation der Signale aus den Lichtsignalphotosensoren (S1 bis Sn) hinsichtlich des Dunkelreferenzsignals aus dem Dunkelsignalphotosensor (Sd), wobei
    das Halbleiter-Photosensorteil eine zwischen dem Dunkelsignalphotosensor (Sd) und den Lichtsignalphotosensoren (S1 bis Sn) angeordnete Einrichtung (Sf) zur Beseitigung von durch auftreffendes Licht in dem Lichtempfangsabschnitt erzeugten überschüssigen Trägern aufweist, wobei die Einrichtung (Sf) zur Beseitigung überschüssiger Träger einen Halbleiterbereich (103) zum Empfang überschüssiger Träger und eine Einrichtung (105, 106, 108, 110) zum Anlegen einer Vorspannung (Vfx) an den Halbleiterbereich aufweist, wodurch bei Anlegen der Vorspannung (Vfx) der Halbleiterbereich (103) überschüssige Träger empfängt, während die Lichtsignalphotosensoren (S1 bis Sn) Signale entsprechend auftreffendem Licht sammeln und ein Fluß von Photosignalen aus dem Lichtempfangsabschnitt zu dem Dunkelsignalphotosensor blockiert wird, sowie
    die Einrichtung (3) zur Kompensation der Signale aus den Lichtsignalphotosensoren (S1 bis Sn) dazu eingerichtet ist, das aus der Einrichtung (Sf) zur Beseitigung überschüssiger Träger ausgegebene Signal zu ignorieren.
  2. Vorrichtung nach Anspruch 1, mit Einrichtungen (11, 12, 13, 14) zum Lesen von Ausgangssignalen aus dem Dunkelsignalphotosensor (Sd), der Einrichtung (Sf) zur Beseitigung überschüssiger Träger und den Lichtsignalphotosensoren (S1 bis Sn).
  3. Vorrichtung nach Anspruch 1 oder 2, mit einer Einrichtung (77) zum Anlegen einer Vorspannung (Vfx) an den Halbleiterbereich (103).
  4. Vorrichtung nach einem der Ansprüche 1 bis 3, wobei jeder Photosensor (Sd, S1 bis Sn) einen photoelektrischen Wandlertransistor mit einem Steuerbereich (103) zum Sammeln von durch Lichtanregung erzeugten Trägern aufweist, und
       die Einrichtung (Sf) zur Beseitigung überschüssiger Träger einen Transistor mit demselben Aufbau wie die photoelektrischen Wandlertransistoren der Photosensoren (Sd, S1 bis Sn) aufweist, wobei der Halbleiterbereich (103) zum Empfang überschüssiger Träger einen Steuerbereich für den Transistor vorsieht.
  5. Vorrichtung nach Anspruch 4, wobei jeder Photosensor (Sd, S1 bis Sn) einen mit dem Steuerbereich (103) des photoelektrischen Wandlertransistors des Photosensors elektrisch verbundenen Rücksetz-MOS-Transistor (5; 105, 106, 108) aufweist.
  6. Vorrichtung nach Anspruch 5, wobei die Einrichtung (105, 106, 108, 110) zum Anlegen einer Vorspannung (Vfx) an die Einrichtung (Sf) zur Beseitigung überschüssiger Träger einen Rücksetz-MOS-Transistor (5; 105, 106, 108) aufweist, der denselben Aufbau wie die Rücksetz-MOS-Transistoren der Photosensoren (Sd, S1 bis Sn) hat und mit dem Halbleiterbereich (103) zum Empfang überschüssiger Träger verbunden ist.
  7. Vorrichtung nach Anspruch 5, wobei die Einrichtung zum Anlegen einer Vorspannung (Vfx) bei der Einrichtung (Sf) zur Beseitigung überschüssiger Träger eine direkt mit dem Halbleiterbereich (103) zum Empfang überschüssiger Träger verbundene Elektrode aufweist.
  8. Vorrichtung nach einem der vorangehenden Ansprüche, wobei die Einrichtung (Sf) zur Beseitigung überschüssiger Träger mit dem gegen Licht abgeschirmten Abschnitt versehen ist.
  9. Vorrichtung nach einem der vorangehenden Ansprüche, wobei der Lichtempfangsabschnitt eine Vielzahl von Zeilen aufweist, bei denen jede Zeile einen Lichtempfangsabschnitt mit einer Vielzahl von Lichtsignalphotosensoren, einen entsprechenden gegen Licht abgeschirmten Abschnitt mit einem Dunkelsignalphotosensor und eine entsprechende zwischen dem Dunkelsignalphotosensor und den Lichtsignalphotosensoren vorgesehene Einrichtung zur Beseitigung überschüssiger Träger aufweist.
  10. Verfahren zum Betrieb der Vorrichtung nach einem der vorangehenden Ansprüche zur Photoumwandlung mit
    Lesen einer Vielzahl von Signalen entsprechend auftreffendem Licht aus der Vielzahl von Lichtsignalphotosensoren (S1 bis Sn) bei dem Lichtempfanqsabschnitt der Vorrichtung und Lesen eines Dunkelreferenzsignals aus dem Dunkelsignalphotosensor (Sd) bei dem gegen Licht abgeschirmten Abschnitt der Vorrichtung,
    Kompensieren der Signale entsprechend dem auftreffenden Licht hinsichtlich des Dunkelreferenzsignals und
    Anlegen einer Vorspannung (Vfx) an den Halbleiterbereich (103) der Vorrichtung, wodurch der Halbleiterbereich (103) überschüssige Träger empfängt, während die Signale entsprechend auftreffendem Licht durch die Lichtsignalphotosensoren (S1 bis Sn) gesammelt werden und ein Fluß von Photosignalen aus den Photosensoren (S1 bis Sn) zu dem Dunkelsignalphotosensor (Sd) blockiert wird,
    wobei kein aus der Einrichtung (Sf) zur Beseitigung überschüssiger Träger der Vorrichtung gelesenes Signal zur Kompensation der Signale entsprechend auftreffendem Licht verwendet wird.
EP88300346A 1987-01-16 1988-01-15 Photovoltaischer Wandler Expired - Lifetime EP0275217B1 (de)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP6255/87 1987-01-16
JP62006255A JPH0628412B2 (ja) 1987-01-16 1987-01-16 光電変換装置
JP6252/87 1987-01-16
JP62006252A JPH0682819B2 (ja) 1987-01-16 1987-01-16 光電変換装置
JP77951/87 1987-03-31
JP62077951A JPH0724301B2 (ja) 1987-03-31 1987-03-31 光電変換装置

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EP0275217A2 EP0275217A2 (de) 1988-07-20
EP0275217A3 EP0275217A3 (de) 1989-12-13
EP0275217B1 true EP0275217B1 (de) 1998-07-22

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DE3856221T2 (de) 1999-01-07
DE3856221D1 (de) 1998-08-27
EP0275217A2 (de) 1988-07-20
EP0275217A3 (de) 1989-12-13
US4879470A (en) 1989-11-07

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