EP0151087B1 - Vorrichtung zur gegenseitigen Informationsübertragung - Google Patents
Vorrichtung zur gegenseitigen Informationsübertragung Download PDFInfo
- Publication number
- EP0151087B1 EP0151087B1 EP85730009A EP85730009A EP0151087B1 EP 0151087 B1 EP0151087 B1 EP 0151087B1 EP 85730009 A EP85730009 A EP 85730009A EP 85730009 A EP85730009 A EP 85730009A EP 0151087 B1 EP0151087 B1 EP 0151087B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- signal
- input
- comparator
- output
- lock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
- G07C9/00309—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with bidirectional data transmission between data carrier and locks
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
- G07C2009/00753—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated by active electrical keys
- G07C2009/00769—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated by active electrical keys with data transmission performed by wireless means
- G07C2009/00777—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated by active electrical keys with data transmission performed by wireless means by induction
Definitions
- the invention relates to a device for the mutual transmission of information between an electric lock and a key in connection with an electronic locking device according to the preamble of claim 1.
- An identification system is known from US-A-4 333 072 which is particularly suitable for implantation in animals.
- the information transmission between the stationary part takes place by means of inductively coupled coils, load changes in the circuit on the movable implant being utilized and the evaluation of the information on the part of the stationary parts, preferably by filtering, being achieved.
- the object of the invention is to design the device of the type mentioned at the beginning with inexpensive and easily testable components in such a way that it is ensured that an output signal occurs only during the damping of the lock-side coil by the key-side coil and temperature influences and other disturbances on the decoding have no influence.
- the basic features of the invention are that the signal having short-circuit or damping waves removed from the lock part is passed on to two guide branches, each of which is connected to one of the differential inputs of a first comparator, one branch of which is connected to the input of the comparator the signal picked up by a fixed voltage divider is brought in, while a rectified signal is applied from the other branch to the + input of the comparator, which sets a threshold compared to the signal at the - input, so that only at the output of the first operational amplifier a positive signal appears when the level of the rectified signal of the + input is above the signal level of the - input and that the signal taken from the lock part is fed to a second comparator and that both its output signal and the output signal of the first comparator open two flip-flop devices are switched, which are combined in such a way that an output signal is only supplied if the lock coil has been damped over several half-waves.
- a feature of the invention is that a voltage divider (R 2 / R 3) is provided in a guide branch for the signal (A) taken from the lock part, from whose tap the reduced signal (C) is fed to the input of the first comparator.
- a diode (D 3) for transmitting the positive half-waves and a capacitor (C 3) for smoothing the half-waves and a potentiometer (P 4 ) are provided for tapping the level of the DC voltage and that this DC voltage (P) is fed as a threshold to the partial signal (C) of the first guide branch to the + input of the first comparator.
- a still further feature of the invention is that the signal (A) or partial signal taken from the lock part (part 1) is connected to ground by a second comparator (K 2) and that the output signal of the first comparator (K 1) as well as that of the second comparator (K 2) of a flip-flop device (D-FF 1) is connected, at the clear input of which the output signal of the first comparator (K 1) is present and at whose D input there is a positive supply voltage.
- K 2 the signal (A) or partial signal taken from the lock part (part 1) is connected to ground by a second comparator (K 2) and that the output signal of the first comparator (K 1) as well as that of the second comparator (K 2) of a flip-flop device (D-FF 1) is connected, at the clear input of which the output signal of the first comparator (K 1) is present and at whose D input there is a positive supply voltage.
- the Q output of the above-mentioned flip-flop device is connected to the D input of a subsequent further flip-flop (D-FF 2).
- D-FF 2 the Q output of the second flip-flop Flops generates a signal corresponding to the short circuit signal.
- the direct voltage supplied to the first comparator is generated by a digital-to-analog converter in conjunction with control electronics, and is applied to the second + input of the first comparator so that the first Comparator clearly provides output signals for the short circuit when the short circuit signals occur at its first input (input).
- the invention is explained in more detail with reference to the circuits of FIGS. 1 and 2 that represent two exemplary embodiments in conjunction with the signal sequences of FIGS. 3 and 4.
- part 1 represents the lock part and part 2 the key part.
- Part 1 has a generator G which generates a periodic high-frequency signal and which signal is conducted via a resistor R 1 and an antenna coil L 1.
- an antenna coil L 2 is provided which is coupled to the lock coil and which, with the aid of the components DIODES D 1, D 2 and the capacitors C 1, C 2, represents a Delon rectifier circuit and supplies the electronics E 1 with DC voltage.
- the electronics E 1 is used to query and count the positive half-waves of the key circuit via point B.
- the electronics E 1 contains a coding with which it is determined when the switch S 1 is short-circuited. Of the two waveforms, it is no longer the one of the lock circuit that is determining, but that of the key circuit. At a certain point in time (after n positive half-waves of the signal) there is a short circuit which can be detected at A late by ⁇ t. With this principle, the signals that appear on the key side can be detected at A and are thus fully synchronized.
- the signal curve coming from A is split into two branches, both of which lead to a comparator K 1.
- the signal is passed to the negative input of K 1 via a voltage divider consisting of R 2, R 3, while a rectified signal P, which has been generated by the switching elements of the second branch, is brought to the positive input.
- a diode D 3 for transmitting the positive half-waves and for blocking the DC voltage
- a capacitor C 3 for storing the charge
- an adjustable potentiometer P 4 where it is used to tap the level of the DC voltage.
- a threshold is set which determines the switching point of the comparator K 1.
- the voltage value of P at the + input of K 1 compares the signal at the - input with the result that the comparator K 1 gives a positive signal voltage 1 if the voltage value of C is less than that of P, and the K 1 switches off when the voltage value of C is greater than that of P, as can be seen in the illustration 1 in FIG. 3.
- signal A or partial signal C is applied to the + input of a further comparator K 2, the second input of which is connected to ground.
- K 2 the second input of which is connected to ground.
- W the rectangular curve of which can be seen in FIG. 3.
- the signal passed through an inverter W which accordingly represents an inversion to W, is also shown in FIG. 3.
- the signal W is applied to the clock input of the flip-flop D-FF-1.
- the data input of D-FF-1 is at the positive supply voltage of 5 V, for example.
- the output signal I of K 1 is connected to the prearranged clear input CLR of the flip-flop D-FF-1. If the signal I is now positive at the clear input of the D-FF-1, the rising edge of a W pulse switches on the output Q 1 of the D-FF-1, which leads to the signal H.
- the pre-authorized clear input CLR of the D-FF-1 causes the D-FF-1 to switch off immediately as soon as the I signal goes to 0, whereby it should be pointed out that this happens independently of the W signal.
- the Q1 output of the D-FF-1 is connected to the input of a subsequent flip-flop D-FF-2.
- This further flip-flop eliminates the pulses of the pulse train H which are not desired and which are brief compared to the short-circuit signal, so that the signal V corresponding to the short-circuit results.
- the inverted already mentioned W Signal is applied to the clock input of D-FF-2.
- the rising edges of the W Signal the times at which the H signal is interrogated by D-FF-2 and transmitted to the output Q2 as a V signal.
- the short-term pulses of the H signal do not appear because they lie exactly between the times of the query. In this way it is achieved that the output signal V corresponds to the short-circuit times and that the short-term pulses falling in time in the short-circuit are eliminated.
- the arrangement described above has the disadvantage of setting the rectified voltage on the potentiometer P 4. Since all components are not technically completely identical, the absolute level of the short-circuit signal and the distance between the short-circuit signal and the rectified signal are not the same in every real arrangement, that is, the potentiometer P 4 must be adjusted manually for each circuit. If later changes are made to the technical parameters of such a circuit, which was adjusted once during manufacture, it must also be readjusted in operational use. It would therefore not be guaranteed that such a circuit clearly indicates the short-circuit signals in use. In order to avoid this disadvantage, a solution according to FIG. 2 is constructed.
- the analog-digital converter D / A is controlled via the electronics so that an analog output signal P is applied to the + input of the comparator K 1.
- the D / A converter initially places such high values on the + input of the comparator K 1 that the output I is always positive.
- curve P shows the gradual change in the output value of the digital-to-analog converter. These output values of the digital-to-analog converter are gradually reduced until the peak values of the comparator K 1 are also fallen below. This results in pulses at the output of comparator 1.
- Curve I in FIG. 4, right part. This change in state of the signal I is evaluated by the electronics E 2 and determines the number of further stages which the digital-analog converter with its output P must still be reduced. The number of stages is precisely defined so that the DC voltage P lies in the range between the short-circuit peaks and the maximum peaks of the signals at the input of the comparator K 1.
- Fig. 3 curves P and C.
- Another advantage of this circuit is that there is no division of the signal into two Paths results, over which the same signal is distributed across the two inputs of K 1.
- the signal taken from part 2 is passed only once via the voltage divider R 2, R 3 to the input of the comparator.
- the output of this comparator K 1 is fed directly into the electronics E2, which then determines the level of the signal at the + input of the comparator via the D / A converter. So if the ratio of the voltage converter R2, R3 is changed, this circuit automatically follows the change.
- circuit according to the invention it is possible to transmit information from the lock to the key even by short-circuiting the lock coil, the same signal recognition being constructed on the key side as on the lock side.
- the advantage of the circuit according to the invention lies on the one hand in the use of the simplest commercially available components and on the other hand in the independence of signal changes at A, since these affect both branches of the input of the comparator K 1 and thus an increase in the AC voltage input and an increase in the DC voltage input at the same time results.
- the comparator creates the difference between the two signals and thus eliminates temperature influences and other disturbances.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Lock And Its Accessories (AREA)
- Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
- Near-Field Transmission Systems (AREA)
- Electronic Switches (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT85730009T ATE65577T1 (de) | 1984-01-27 | 1985-01-28 | Vorrichtung zur gegenseitigen informationsuebertragung. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3402737 | 1984-01-27 | ||
DE3402737A DE3402737C1 (de) | 1984-01-27 | 1984-01-27 | Vorrichtung zur gegenseitigen Informationsuebertragung |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0151087A2 EP0151087A2 (de) | 1985-08-07 |
EP0151087A3 EP0151087A3 (en) | 1988-06-01 |
EP0151087B1 true EP0151087B1 (de) | 1991-07-24 |
Family
ID=6226018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP85730009A Expired - Lifetime EP0151087B1 (de) | 1984-01-27 | 1985-01-28 | Vorrichtung zur gegenseitigen Informationsübertragung |
Country Status (6)
Country | Link |
---|---|
US (1) | US4602253A (fi) |
EP (1) | EP0151087B1 (fi) |
AT (1) | ATE65577T1 (fi) |
CA (1) | CA1217839A (fi) |
DE (1) | DE3402737C1 (fi) |
FI (1) | FI78535C (fi) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60171475A (ja) * | 1984-02-15 | 1985-09-04 | アイデンティフィケ−ション・デバイセス・インコ−ポレ−テッド | 識別システム |
DE3544689A1 (de) * | 1985-12-18 | 1987-07-02 | Angewandte Digital Elektronik | Vorrichtung zur initialisierung einer schaltung nach dem prinzip des synchronschalters |
DE3613666A1 (de) * | 1986-04-23 | 1987-10-29 | Bks Gmbh | Verfahren zur bidirektionalen datenuebertragung und danach arbeitendes elektronisches schlosssystem |
DE3614477A1 (de) * | 1986-04-29 | 1987-11-05 | Angewandte Digital Elektronik | Vorrichtung zur bidirektionalen datenuebertragung |
GB8617662D0 (en) * | 1986-07-18 | 1986-08-28 | Neiman Security Prod | Control apparatus |
NL8700861A (nl) * | 1987-04-13 | 1988-11-01 | Nedap Nv | Lees-, schrijfsysteem met miniatuur informatiedrager. |
DE3735470A1 (de) * | 1987-10-20 | 1989-05-03 | Franzen Sicherheitstechnik Gmb | Schliesseinrichtung mit kontaktloser daten- und leistungsstromuebertragung zwischen schloss und schluessel |
US4891636A (en) * | 1987-11-20 | 1990-01-02 | Ncr Corporation | Electronic keylock system |
US5701121A (en) * | 1988-04-11 | 1997-12-23 | Uniscan Ltd. | Transducer and interrogator device |
US4937781A (en) * | 1988-05-13 | 1990-06-26 | Dallas Semiconductor Corporation | Dual port ram with arbitration status register |
FR2635809B1 (fr) * | 1988-08-24 | 1990-11-23 | Samokine Georges | Systeme d'echange d'informations entre un objet portatif comme une cle, et un dispositif d'echange |
US4967108A (en) * | 1988-12-09 | 1990-10-30 | Dallas Semiconductor Corporation | Differential-time-constant bandpass filter using the analog properties of digital circuits |
US4989261A (en) * | 1988-12-09 | 1991-01-29 | Dallas Semiconductor Corporation | Power supply intercept with reference output |
US5684828A (en) * | 1988-12-09 | 1997-11-04 | Dallas Semiconductor Corp. | Wireless data module with two separate transmitter control outputs |
US5025486A (en) * | 1988-12-09 | 1991-06-18 | Dallas Semiconductor Corporation | Wireless communication system with parallel polling |
AU645487B2 (en) * | 1989-02-17 | 1994-01-20 | Integrated Silicon Design Pty Ltd | Transponder system |
CH680082A5 (fi) * | 1989-12-15 | 1992-06-15 | Bauer Kaba Ag | |
DE4031692C1 (en) * | 1990-10-02 | 1992-06-04 | Angewandte Digital Elektronik Gmbh, 2051 Brunstorf, De | Electronic key circuit in contactless chip=card - forms interface working with prim. electronic integrated circuit using interactive coils with ferrite cores buried in substrate |
US5206639A (en) * | 1990-10-25 | 1993-04-27 | Timex Corporation | Single antenna dual frequency transponder |
GB9100336D0 (en) * | 1991-01-08 | 1991-02-20 | Chubb Lips Nederland Bv | Locks |
US5523749A (en) * | 1991-04-03 | 1996-06-04 | Integrated Silicon Design Pty. Ltd. | Identification system for simultaneously interrogated labels |
US5266926A (en) * | 1991-05-31 | 1993-11-30 | Avid Marketing, Inc. | Signal transmission and tag power consumption measurement circuit for an inductive reader |
DE4207160C1 (fi) * | 1992-03-06 | 1993-02-11 | Aug. Winkhaus Gmbh & Co Kg, 4404 Telgte, De | |
DE4230148C2 (de) * | 1992-09-09 | 1994-08-25 | Angewandte Digital Elektronik | Schaltungsanordnung zum Nachweis einer Unterbrechung der elektrischen Verbindung von kontaktfrei arbeitenden Chipkarten zu ihrem Schreib/Lesegerät |
US5365872A (en) * | 1993-05-07 | 1994-11-22 | Obrinski Bradley A | Remote controlled mooring system |
DE19520211A1 (de) * | 1994-06-03 | 1996-02-01 | Strattec Security Corp | Elektronische Verriegelungsanordnung für ein Schloßsystem |
US5438270A (en) * | 1994-06-24 | 1995-08-01 | National Semiconductor Corporation | Low battery tester comparing load and no-load battery voltage |
EP0710756B1 (de) * | 1994-11-07 | 2001-04-04 | Siemens Aktiengesellschaft | Diebstahlschutzsystem für ein Kraftfahrzeug |
FR2729700B1 (fr) * | 1995-01-25 | 1997-07-04 | Nofal Dawalibi | Dispositif electronique de fermeture programmable |
EP0730071A1 (de) * | 1995-03-03 | 1996-09-04 | Siemens Aktiengesellschaft | Diebstahlschutzsystem für ein Kraftfahrzeug |
US5566212A (en) * | 1995-04-24 | 1996-10-15 | Delco Electronics Corporation | Phase-locked loop circuit for Manchester-data decoding |
US5614811A (en) * | 1995-09-26 | 1997-03-25 | Dyalem Concepts, Inc. | Power line control system |
US6564601B2 (en) * | 1995-09-29 | 2003-05-20 | Hyatt Jr Richard G | Electromechanical cylinder plug |
DE19603320C2 (de) * | 1996-01-31 | 1999-01-14 | Guenter Uhlmann | Elektronisch programmierbares Schließsystem mit Schloß und Schlüssel |
US6588243B1 (en) | 1997-06-06 | 2003-07-08 | Richard G. Hyatt, Jr. | Electronic cam assembly |
DE19726335C2 (de) | 1997-06-20 | 2000-03-02 | Angewandte Digital Elektronik | Chipkarte mit mindestens zwei Spulenanordnungen zur Übertragung von Daten und/oder Energie |
FR2780222B1 (fr) * | 1998-06-18 | 2000-08-11 | Sgs Thomson Microelectronics | Procede et systeme de detection par couplage inductif d'un signal de modulation de charge |
US6307468B1 (en) | 1999-07-20 | 2001-10-23 | Avid Identification Systems, Inc. | Impedance matching network and multidimensional electromagnetic field coil for a transponder interrogator |
US6958551B2 (en) * | 2002-06-25 | 2005-10-25 | Strattec Security Corporation | Vehicle coded ignition lock using a magnetic sensor |
US9154002B2 (en) * | 2010-01-25 | 2015-10-06 | Access Business Group International Llc | Systems and methods for detecting data communication over a wireless power link |
JP5750031B2 (ja) * | 2010-11-19 | 2015-07-15 | 株式会社半導体エネルギー研究所 | 電子回路及び半導体装置 |
TWI604119B (zh) | 2013-03-15 | 2017-11-01 | 薩爾金特製造公司 | 擷取鎖控制器脈衝的電子電路 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2927321A (en) * | 1956-01-26 | 1960-03-01 | Donald B Harris | Radio transmission systems with modulatable passive responder |
US3299424A (en) * | 1965-05-07 | 1967-01-17 | Jorgen P Vinding | Interrogator-responder identification system |
US3440633A (en) * | 1965-10-18 | 1969-04-22 | Jorgen P Vinding | Interrogator-responder identification system |
FR2051914A5 (fi) * | 1969-07-01 | 1971-04-09 | Trt Telecom Radio Electr | |
US3721830A (en) * | 1971-06-18 | 1973-03-20 | Tokyo Electric Power Co | Pulse dip carrier system using ac distribution line |
US3859624A (en) * | 1972-09-05 | 1975-01-07 | Thomas A Kriofsky | Inductively coupled transmitter-responder arrangement |
DE2634303A1 (de) * | 1976-07-30 | 1978-02-02 | Knorr Bremse Gmbh | Elektronische schliesseinrichtung |
US4114151A (en) * | 1976-09-14 | 1978-09-12 | Alfa-Laval Company Limited | Passive transponder apparatus for use in an interrogator-responder system |
CH618553A5 (fi) * | 1977-08-25 | 1980-07-31 | Landis & Gyr Ag | |
US4328482A (en) * | 1977-11-17 | 1982-05-04 | Consumer Electronic Products Corporation | Remote AC power control with control pulses at the zero crossing of the AC wave |
US4333072A (en) * | 1979-08-06 | 1982-06-01 | International Identification Incorporated | Identification device |
US4388524A (en) * | 1981-09-16 | 1983-06-14 | Walton Charles A | Electronic identification and recognition system with code changeable reactance |
DE3221356C2 (de) * | 1981-12-16 | 1987-03-12 | Angewandte Digital Elektronik Gmbh, 2051 Brunstorf | Vorrichtung zur induktiven Identifizierung einer Berechtigungsinformation |
DE3149789C1 (de) * | 1981-12-16 | 1983-08-25 | Angewandte Digital Elektronik Gmbh, 2051 Brunstorf | Vorrichtung zur induktiven Identifizierung einer Information |
US4473825A (en) * | 1982-03-05 | 1984-09-25 | Walton Charles A | Electronic identification system with power input-output interlock and increased capabilities |
-
1984
- 1984-01-27 DE DE3402737A patent/DE3402737C1/de not_active Expired
-
1985
- 1985-01-15 FI FI850166A patent/FI78535C/fi not_active IP Right Cessation
- 1985-01-25 CA CA000472841A patent/CA1217839A/en not_active Expired
- 1985-01-28 EP EP85730009A patent/EP0151087B1/de not_active Expired - Lifetime
- 1985-01-28 AT AT85730009T patent/ATE65577T1/de active
- 1985-01-28 US US06/695,347 patent/US4602253A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA1217839A (en) | 1987-02-10 |
FI78535C (fi) | 1989-08-10 |
EP0151087A2 (de) | 1985-08-07 |
FI78535B (fi) | 1989-04-28 |
DE3402737C1 (de) | 1985-08-01 |
FI850166L (fi) | 1985-07-28 |
US4602253A (en) | 1986-07-22 |
EP0151087A3 (en) | 1988-06-01 |
ATE65577T1 (de) | 1991-08-15 |
FI850166A0 (fi) | 1985-01-15 |
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