EP0116603A1 - Gerät zum senden und empfangen digitaler signale - Google Patents

Gerät zum senden und empfangen digitaler signale

Info

Publication number
EP0116603A1
EP0116603A1 EP83902728A EP83902728A EP0116603A1 EP 0116603 A1 EP0116603 A1 EP 0116603A1 EP 83902728 A EP83902728 A EP 83902728A EP 83902728 A EP83902728 A EP 83902728A EP 0116603 A1 EP0116603 A1 EP 0116603A1
Authority
EP
European Patent Office
Prior art keywords
bus terminal
voltage
coupled
voltage switch
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP83902728A
Other languages
English (en)
French (fr)
Other versions
EP0116603A4 (de
Inventor
Randolph B. Haagens
Roy J. Levy
David L. Campbell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of EP0116603A1 publication Critical patent/EP0116603A1/de
Publication of EP0116603A4 publication Critical patent/EP0116603A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/403—Bus networks with centralised control, e.g. polling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks

Definitions

  • This invention relates to digital signal transmission systems for use in computers and the like. Particularly, the invention relates to a shared- bus digital balanced- line transmission system for use in communication between digital devices.
  • OMPI are not to be confused with the present approach wherein there is differential activity with unipolar voltages, i.e., an active state and a passive state.
  • Examples of prior art patents are U.S. Patent No. 4, 121, 118 to Miyazaki entitled “Bipolar Signal Generating Apparatus'* and U.S. Patent No. 3,671,671 to Watanabe entitled "Pulse Transmitting and Receiving System".
  • the Wantanabe circuit employs only current-mode drivers and does not appear to be useful in a wired-OR or wired-AND configuration.
  • a transceiver 10 comprising a first voltage switch 12, a second voltage switch 14 and a differential line receiver 16 coupled to a first terminal 18 and second terminal 20.
  • the first voltage switch 12 is coupled between a first voltage source +V 2 and a node of the first terminal 18, and the second voltage switch 14 is coupled between a second voltage source +V 1 a node of the second terminal 20.
  • the voltage +V 2 ⁇ s typically more positive than the voltage +V, .
  • Bias voltages for terminals 18 and 20 are selected such that switching of the voltage switches 12 and 14 causes a reversal in relative polarity between first terminal 18 and second terminal 20.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
EP19830902728 1982-08-09 1983-08-02 Gerät zum senden und empfangen digitaler signale. Withdrawn EP0116603A4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US40664282A 1982-08-09 1982-08-09
US406642 1982-08-09

Publications (2)

Publication Number Publication Date
EP0116603A1 true EP0116603A1 (de) 1984-08-29
EP0116603A4 EP0116603A4 (de) 1984-11-22

Family

ID=23608857

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19830902728 Withdrawn EP0116603A4 (de) 1982-08-09 1983-08-02 Gerät zum senden und empfangen digitaler signale.

Country Status (3)

Country Link
EP (1) EP0116603A4 (de)
JP (1) JPS59501391A (de)
WO (1) WO1984000862A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE43215T1 (de) * 1984-07-20 1989-06-15 Siemens Ag Busleitungssystem mit zwei signalleitern mit daran jeweils ueber zwei differenzausgaenge angeschlossenen sendeeinrichtungen.
CA1278871C (en) * 1986-02-24 1991-01-08 Frederick O. R. Miesterfeld Method of data arbitration and collision detection on a data bus
EP0275464B1 (de) * 1986-12-11 1992-02-19 Siemens Nixdorf Informationssysteme Aktiengesellschaft Sende-Empfangs-Einrichtung für ein Busleitungssystem
GB8912461D0 (en) * 1989-05-31 1989-07-19 Lucas Ind Plc Line driver
US5056110A (en) * 1989-12-11 1991-10-08 Mips Computer Systems, Inc. Differential bus with specified default value
US5023488A (en) * 1990-03-30 1991-06-11 Xerox Corporation Drivers and receivers for interfacing VLSI CMOS circuits to transmission lines
DE69231289T2 (de) * 1991-10-16 2001-01-04 Furukawa Electric Co Ltd Multiplexübertragungssystem
JP3133499B2 (ja) * 1991-10-16 2001-02-05 古河電気工業株式会社 多重伝送方式
US5430396A (en) * 1994-07-27 1995-07-04 At&T Corp. Backplane bus for differential signals
US6980773B2 (en) 2001-07-18 2005-12-27 Telefonaktiebolaget L M Ericsson (Publ) Apparatus and method for bias compensation in line circuits

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3015661A1 (de) * 1980-04-23 1981-10-29 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum uebertragen von binaeren signalen

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3381090A (en) * 1964-10-01 1968-04-30 Ibm Balanced line driver
US3497619A (en) * 1967-10-06 1970-02-24 Us Navy Digital data transmission system
JPS4841722B1 (de) * 1969-06-13 1973-12-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3015661A1 (de) * 1980-04-23 1981-10-29 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum uebertragen von binaeren signalen

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO8400862A1 *

Also Published As

Publication number Publication date
EP0116603A4 (de) 1984-11-22
JPS59501391A (ja) 1984-08-02
WO1984000862A1 (en) 1984-03-01

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19840410

AK Designated contracting states

Designated state(s): DE FR GB

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 19860303

RIN1 Information on inventor provided before grant (corrected)

Inventor name: CAMPBELL, DAVID, L.

Inventor name: HAAGENS, RANDOLPH, B.

Inventor name: LEVY, ROY, J.