EE03884B1 - Väikese võimsustarbega lineaarse tagasisidega nihkeregistrid - Google Patents

Väikese võimsustarbega lineaarse tagasisidega nihkeregistrid

Info

Publication number
EE03884B1
EE03884B1 EEP200000661A EEP200000661A EE03884B1 EE 03884 B1 EE03884 B1 EE 03884B1 EE P200000661 A EEP200000661 A EE P200000661A EE P200000661 A EEP200000661 A EE P200000661A EE 03884 B1 EE03884 B1 EE 03884B1
Authority
EE
Estonia
Prior art keywords
memory device
output terminal
low power
linear feedback
shift operation
Prior art date
Application number
EEP200000661A
Other languages
English (en)
Estonian (et)
Inventor
Hansson Mattias
Original Assignee
Telefonaktiebolaget Lm Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget Lm Ericsson (Publ) filed Critical Telefonaktiebolaget Lm Ericsson (Publ)
Publication of EE200000661A publication Critical patent/EE200000661A/xx
Publication of EE03884B1 publication Critical patent/EE03884B1/xx

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Landscapes

  • Shift Register Type Memory (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Logic Circuits (AREA)
  • Acyclic And Carbocyclic Compounds In Medicinal Compositions (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
EEP200000661A 1998-05-18 1999-05-12 Väikese võimsustarbega lineaarse tagasisidega nihkeregistrid EE03884B1 (et)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9801781A SE512009C2 (sv) 1998-05-18 1998-05-18 Linjärt återkopplade skiftregister med låg effekt
PCT/SE1999/000805 WO1999060574A1 (en) 1998-05-18 1999-05-12 Low power linear feedback shift registers

Publications (2)

Publication Number Publication Date
EE200000661A EE200000661A (et) 2002-04-15
EE03884B1 true EE03884B1 (et) 2002-10-15

Family

ID=20411391

Family Applications (1)

Application Number Title Priority Date Filing Date
EEP200000661A EE03884B1 (et) 1998-05-18 1999-05-12 Väikese võimsustarbega lineaarse tagasisidega nihkeregistrid

Country Status (12)

Country Link
US (1) US6442579B1 (xx)
EP (1) EP1086468B1 (xx)
CN (1) CN1153224C (xx)
AT (1) ATE279008T1 (xx)
AU (1) AU4539299A (xx)
BR (1) BR9910563A (xx)
DE (1) DE69920907D1 (xx)
EE (1) EE03884B1 (xx)
HK (1) HK1038093A1 (xx)
MY (1) MY122206A (xx)
SE (1) SE512009C2 (xx)
WO (1) WO1999060574A1 (xx)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6691142B2 (en) * 2001-01-09 2004-02-10 Hewlett-Packard Development Company, L.P. Pseudo random address generator for 0.75M cache
US7149764B2 (en) * 2002-11-21 2006-12-12 Ip-First, Llc Random number generator bit string filter
US7219112B2 (en) * 2001-11-20 2007-05-15 Ip-First, Llc Microprocessor with instruction translator for translating an instruction for storing random data bytes
US7136991B2 (en) * 2001-11-20 2006-11-14 Henry G Glenn Microprocessor including random number generator supporting operating system-independent multitasking operation
US20060064448A1 (en) * 2001-11-20 2006-03-23 Ip-First, Llc. Continuous multi-buffering random number generator
US7139785B2 (en) * 2003-02-11 2006-11-21 Ip-First, Llc Apparatus and method for reducing sequential bit correlation in a random number generator
WO2005114415A2 (en) * 2004-05-11 2005-12-01 North Dakota State University Parallel architecture for low power linear feedback shift registers
US6961403B1 (en) * 2004-05-28 2005-11-01 International Business Machines Corporation Programmable frequency divider with symmetrical output
US8184034B2 (en) * 2008-07-21 2012-05-22 Cambridge Silicon Radio Limited Code sequence generator
US8949493B1 (en) * 2010-07-30 2015-02-03 Altera Corporation Configurable multi-lane scrambler for flexible protocol support
US8299817B2 (en) * 2010-11-30 2012-10-30 Stmicroelectronics Asia Pacific Pte Ltd. Circuit and method for adding dither to vertical droop compensation using linear feedback shift registers

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5974433A (en) * 1984-06-29 1999-10-26 Currie; Robert John High speed M-sequence generator and decoder circuit
JPH03214809A (ja) * 1990-01-19 1991-09-20 Nec Corp リニアフィードバック・シフトレジスタ
JPH0520887A (ja) * 1990-11-21 1993-01-29 Nippon Steel Corp シフト回路及びシフトレジスタ
US5867409A (en) * 1995-03-09 1999-02-02 Kabushiki Kaisha Toshiba Linear feedback shift register
JP3651154B2 (ja) * 1996-12-27 2005-05-25 ソニー株式会社 Pn符号発生回路及び無線システムの端末装置

Also Published As

Publication number Publication date
ATE279008T1 (de) 2004-10-15
MY122206A (en) 2006-03-31
AU4539299A (en) 1999-12-06
CN1301389A (zh) 2001-06-27
EP1086468B1 (en) 2004-10-06
EP1086468A1 (en) 2001-03-28
DE69920907D1 (de) 2004-11-11
CN1153224C (zh) 2004-06-09
US6442579B1 (en) 2002-08-27
HK1038093A1 (en) 2002-03-01
SE9801781D0 (sv) 1998-05-18
EE200000661A (et) 2002-04-15
BR9910563A (pt) 2001-01-30
SE512009C2 (sv) 2000-01-10
SE9801781L (sv) 1999-11-19
WO1999060574A1 (en) 1999-11-25

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Legal Events

Date Code Title Description
KB4A Valid patent at the end of a year

Effective date: 20021231

KB4A Valid patent at the end of a year

Effective date: 20031231

HE1A Change of address
KB4A Valid patent at the end of a year

Effective date: 20041231

KB4A Valid patent at the end of a year

Effective date: 20051231

KB4A Valid patent at the end of a year

Effective date: 20061231

MM4A Lapsed by not paying the annual fees

Effective date: 20070512