ATE413731T1 - Modifizierte, sich wiederholende zellenvergleichstechnik für integrierte schaltungen - Google Patents
Modifizierte, sich wiederholende zellenvergleichstechnik für integrierte schaltungenInfo
- Publication number
- ATE413731T1 ATE413731T1 AT02769266T AT02769266T ATE413731T1 AT E413731 T1 ATE413731 T1 AT E413731T1 AT 02769266 T AT02769266 T AT 02769266T AT 02769266 T AT02769266 T AT 02769266T AT E413731 T1 ATE413731 T1 AT E413731T1
- Authority
- AT
- Austria
- Prior art keywords
- output
- mismatch
- circuit
- cell
- output circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
- Analogue/Digital Conversion (AREA)
- Logic Circuits (AREA)
- Investigating Or Analysing Biological Materials (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/851,658 US6480136B1 (en) | 2001-05-08 | 2001-05-08 | Modified repetitive cell matching technique for integrated circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE413731T1 true ATE413731T1 (de) | 2008-11-15 |
Family
ID=25311323
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02769266T ATE413731T1 (de) | 2001-05-08 | 2002-04-12 | Modifizierte, sich wiederholende zellenvergleichstechnik für integrierte schaltungen |
Country Status (6)
Country | Link |
---|---|
US (1) | US6480136B1 (de) |
EP (1) | EP1386402B1 (de) |
JP (1) | JP4125602B2 (de) |
AT (1) | ATE413731T1 (de) |
DE (1) | DE60229737D1 (de) |
WO (1) | WO2002091583A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6738788B1 (en) * | 2002-04-17 | 2004-05-18 | Icid, Llc | Database system using a record key having some randomly positioned, non-deterministic bits |
US6802447B2 (en) * | 2002-08-26 | 2004-10-12 | Icid, Llc | Method of authenticating an object or entity using a random binary ID code subject to bit drift |
JP3830914B2 (ja) * | 2003-05-09 | 2006-10-11 | Necエレクトロニクス株式会社 | A/d変換器用の繰り返し性のセルを含むモノリシックチップの集積回路 |
US9354890B1 (en) | 2007-10-23 | 2016-05-31 | Marvell International Ltd. | Call stack structure for enabling execution of code outside of a subroutine and between call stack frames |
US9442758B1 (en) | 2008-01-21 | 2016-09-13 | Marvell International Ltd. | Dynamic processor core switching |
US9582443B1 (en) | 2010-02-12 | 2017-02-28 | Marvell International Ltd. | Serial control channel processor for executing time-based instructions |
US9098694B1 (en) * | 2011-07-06 | 2015-08-04 | Marvell International Ltd. | Clone-resistant logic |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4309768A (en) * | 1979-12-31 | 1982-01-05 | Bell Telephone Laboratories, Incorporated | Mismatch detection circuit for duplicated logic units |
US5175550A (en) | 1990-06-19 | 1992-12-29 | Analog Devices, Inc. | Repetitive cell matching technique for integrated circuits |
US6014098A (en) | 1997-01-22 | 2000-01-11 | Broadcom Corporation | Analog to digital converter |
US5835048A (en) | 1997-01-22 | 1998-11-10 | Broadcom Corporation | Analog-to-digital converter with improved cell mismatch compensation |
US6161213A (en) * | 1999-02-17 | 2000-12-12 | Icid, Llc | System for providing an integrated circuit with a unique identification |
US6356225B1 (en) * | 1999-12-14 | 2002-03-12 | Maxim Integrated Products, Inc. | Averaging cell mismatches in integrated circuits |
-
2001
- 2001-05-08 US US09/851,658 patent/US6480136B1/en not_active Expired - Lifetime
-
2002
- 2002-04-12 AT AT02769266T patent/ATE413731T1/de not_active IP Right Cessation
- 2002-04-12 JP JP2002587930A patent/JP4125602B2/ja not_active Expired - Fee Related
- 2002-04-12 DE DE60229737T patent/DE60229737D1/de not_active Expired - Lifetime
- 2002-04-12 EP EP02769266A patent/EP1386402B1/de not_active Expired - Lifetime
- 2002-04-12 WO PCT/US2002/011772 patent/WO2002091583A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
US6480136B1 (en) | 2002-11-12 |
EP1386402A1 (de) | 2004-02-04 |
JP4125602B2 (ja) | 2008-07-30 |
JP2004529570A (ja) | 2004-09-24 |
DE60229737D1 (de) | 2008-12-18 |
US20020167435A1 (en) | 2002-11-14 |
EP1386402A4 (de) | 2006-06-07 |
WO2002091583A1 (en) | 2002-11-14 |
EP1386402B1 (de) | 2008-11-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |