DE69940967D1 - Elektronische integrierte schaltung mit mindestens einem elektronischen bauelement - Google Patents

Elektronische integrierte schaltung mit mindestens einem elektronischen bauelement

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Publication number
DE69940967D1
DE69940967D1 DE69940967T DE69940967T DE69940967D1 DE 69940967 D1 DE69940967 D1 DE 69940967D1 DE 69940967 T DE69940967 T DE 69940967T DE 69940967 T DE69940967 T DE 69940967T DE 69940967 D1 DE69940967 D1 DE 69940967D1
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DE
Germany
Prior art keywords
electronic
integrated circuit
electronic component
component
electronic integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69940967T
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English (en)
Inventor
Pierre Gidon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Application granted granted Critical
Publication of DE69940967D1 publication Critical patent/DE69940967D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
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    • H01L23/147—Semiconductor insulating substrates
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    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
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    • H01L2224/732—Location after the connecting process
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    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/812—Applying energy for connecting
    • H01L2224/8121—Applying energy for connecting using a reflow oven
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    • H01L2924/1305—Bipolar Junction Transistor [BJT]
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    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Wire Bonding (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE69940967T 1998-08-25 1999-08-24 Elektronische integrierte schaltung mit mindestens einem elektronischen bauelement Expired - Lifetime DE69940967D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9810688A FR2782840B1 (fr) 1998-08-25 1998-08-25 Circuit electronique et procede de realisation d'un circuit electronique integre comprenant au moins un composant electronique de puissance dans une plaque de substrat
PCT/FR1999/002033 WO2000011713A1 (fr) 1998-08-25 1999-08-24 Circuit electronique integre comprenant au moins un composant electronique de puissance

Publications (1)

Publication Number Publication Date
DE69940967D1 true DE69940967D1 (de) 2009-07-23

Family

ID=9529865

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69940967T Expired - Lifetime DE69940967D1 (de) 1998-08-25 1999-08-24 Elektronische integrierte schaltung mit mindestens einem elektronischen bauelement

Country Status (6)

Country Link
US (1) US6423573B1 (de)
EP (1) EP1025584B1 (de)
JP (1) JP4548939B2 (de)
DE (1) DE69940967D1 (de)
FR (1) FR2782840B1 (de)
WO (1) WO2000011713A1 (de)

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US20110182959A1 (en) 2009-07-27 2011-07-28 E.I. Du Pont De Nemours And Company. Removable antimicrobial coating compositions containing acid-activated rheology agent and methods of use
US20110177145A1 (en) 2009-07-27 2011-07-21 E.I. Du Pont De Nemours And Company In situ preparation of peracid-based removable antimicrobial coating compositions and methods of use
US20110177146A1 (en) 2009-07-27 2011-07-21 E. I. Du Pont De Nemours And Company Removable antimicrobial coating compositions containing cationic rheology agent and methods of use
US8222012B2 (en) 2009-10-01 2012-07-17 E. I. Du Pont De Nemours And Company Perhydrolase for enzymatic peracid production
US8586339B2 (en) 2010-03-26 2013-11-19 E. I. Du Pont De Nemours And Company Facilitated process for purification of proteins
WO2011119706A1 (en) 2010-03-26 2011-09-29 E.I. Dupont De Nemours And Company Perhydrolase providing improved specific activity
WO2011119708A1 (en) 2010-03-26 2011-09-29 E.I. Dupont De Nemours And Company Perhydrolase providing improved specific activity
US8450091B2 (en) 2010-03-26 2013-05-28 E. I. Du Pont De Nemours And Company Perhydrolase providing improved specific activity
JP2013523914A (ja) 2010-03-26 2013-06-17 イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー ポリアリーレンスルフィド含有ポリマー溶融物
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CN103383916B (zh) * 2013-08-08 2016-03-02 扬州晶新微电子有限公司 可用于共晶焊的p型硅器件芯片背面金属化方法
DE102013219733B4 (de) * 2013-09-30 2015-05-07 Siemens Aktiengesellschaft Verfahren zur Kantenbeschichtung eines monolithisch integrierten Halbleiterbauelementes
CN113178394B (zh) * 2021-04-28 2023-06-27 浙江集迈科微电子有限公司 减少应力的芯片贴装工艺

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JP2002523900A (ja) 2002-07-30
EP1025584B1 (de) 2009-06-10
EP1025584A1 (de) 2000-08-09
US6423573B1 (en) 2002-07-23
WO2000011713A1 (fr) 2000-03-02
FR2782840A1 (fr) 2000-03-03
FR2782840B1 (fr) 2003-09-05
JP4548939B2 (ja) 2010-09-22

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