DE69826645D1 - Spannungsversorgungsdetektionsschema für flashspeicher - Google Patents

Spannungsversorgungsdetektionsschema für flashspeicher

Info

Publication number
DE69826645D1
DE69826645D1 DE69826645T DE69826645T DE69826645D1 DE 69826645 D1 DE69826645 D1 DE 69826645D1 DE 69826645 T DE69826645 T DE 69826645T DE 69826645 T DE69826645 T DE 69826645T DE 69826645 D1 DE69826645 D1 DE 69826645D1
Authority
DE
Germany
Prior art keywords
voltage supply
flash storage
detection scheme
supply detection
scheme
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69826645T
Other languages
English (en)
Other versions
DE69826645T2 (de
Inventor
E Landgraf
E Larsen
J Taub
Sanjay Talreja
P Dalvi
M Babb
M Pathak
J Haid
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE69826645D1 publication Critical patent/DE69826645D1/de
Application granted granted Critical
Publication of DE69826645T2 publication Critical patent/DE69826645T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G11C16/225—Preventing erasure, programming or reading when power supply voltages are outside the required ranges

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Power Sources (AREA)
DE69826645T 1997-04-11 1998-04-06 Spannungsversorgungsdetektionsschema für flashspeicher Expired - Lifetime DE69826645T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US837001 1992-02-14
US08/837,001 US5896338A (en) 1997-04-11 1997-04-11 Input/output power supply detection scheme for flash memory
PCT/US1998/006846 WO1998047149A1 (en) 1997-04-11 1998-04-06 Power supply detection scheme for flash memory

Publications (2)

Publication Number Publication Date
DE69826645D1 true DE69826645D1 (de) 2004-11-04
DE69826645T2 DE69826645T2 (de) 2005-10-06

Family

ID=25273228

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69826645T Expired - Lifetime DE69826645T2 (de) 1997-04-11 1998-04-06 Spannungsversorgungsdetektionsschema für flashspeicher

Country Status (7)

Country Link
US (1) US5896338A (de)
EP (1) EP0974145B1 (de)
KR (1) KR100343028B1 (de)
AU (1) AU6887998A (de)
DE (1) DE69826645T2 (de)
MY (1) MY116192A (de)
WO (1) WO1998047149A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6628552B1 (en) 1997-04-11 2003-09-30 Intel Corporation Self-configuring input buffer on flash memories
US6157979A (en) * 1998-03-14 2000-12-05 Advanced Technology Materials, Inc. Programmable controlling device with non-volatile ferroelectric state-machines for restarting processor when power is restored with execution states retained in said non-volatile state-machines on power down
US6145020A (en) * 1998-05-14 2000-11-07 Advanced Technology Materials, Inc. Microcontroller incorporating an enhanced peripheral controller for automatic updating the configuration date of multiple peripherals by using a ferroelectric memory array
KR100308479B1 (ko) * 1998-08-11 2001-11-01 윤종용 컴퓨터 시스템 내에서 부트-업 메모리로 사용되는 플래시 메모리 장치 및 그것의 데이터 읽기 방법
ATE325418T1 (de) 2002-03-05 2006-06-15 Koninkl Philips Electronics Nv Produkt und verfahren zur verhinderung der falschen speicherung von daten
US7398554B1 (en) * 2002-04-02 2008-07-08 Winbond Electronics Corporation Secure lock mechanism based on a lock word
US6816994B2 (en) * 2002-06-21 2004-11-09 Micron Technology, Inc. Low power buffer implementation
JP2004178782A (ja) * 2002-10-04 2004-06-24 Sharp Corp 半導体記憶装置およびその制御方法および携帯電子機器
US6795366B2 (en) * 2002-10-15 2004-09-21 Samsung Electronics Co., Ltd. Internal voltage converter scheme for controlling the power-up slope of internal supply voltage
KR100695891B1 (ko) * 2004-11-17 2007-03-19 삼성전자주식회사 동작 모드에 따라 락 아웃을 선택적으로 수행하는 장치 및방법
KR100660537B1 (ko) * 2004-12-27 2006-12-22 삼성전자주식회사 락 아웃 장치 및 이를 구비한 반도체 집적회로 장치
US7319612B2 (en) * 2005-05-18 2008-01-15 Intel Corporation Performing multiple read operations via a single read command
CN106356097B (zh) * 2016-08-25 2020-02-14 浙江宇视科技有限公司 一种防止数据丢失的保护方法和装置
KR102427327B1 (ko) 2017-07-25 2022-08-01 삼성전자주식회사 불휘발성 메모리 장치, 그것의 동작 방법, 및 그것을 포함하는 저장 장치
KR20220030348A (ko) 2020-08-27 2022-03-11 삼성전자주식회사 메모리 장치

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH625932B (fr) * 1979-05-31 Ebauches Electroniques Sa Circuit integre apte a reagir a la presence et a la nature d'un circuit recepteur exterieur.
US4439804A (en) * 1982-03-22 1984-03-27 Rca Corporation Protection circuit for memory programming system
US4617479B1 (en) * 1984-05-03 1993-09-21 Altera Semiconductor Corp. Programmable logic array device using eprom technology
US4774421A (en) * 1984-05-03 1988-09-27 Altera Corporation Programmable logic array device using EPROM technology
JP2869791B2 (ja) * 1988-08-31 1999-03-10 株式会社日立製作所 半導体集積回路装置およびそれを応用した電子装置
US4975883A (en) * 1990-03-29 1990-12-04 Intel Corporation Method and apparatus for preventing the erasure and programming of a nonvolatile memory
US5283762A (en) * 1990-05-09 1994-02-01 Mitsubishi Denki Kabushiki Kaisha Semiconductor device containing voltage converting circuit and operating method thereof
JP2758259B2 (ja) * 1990-09-27 1998-05-28 株式会社東芝 バッファ回路
US5223751A (en) * 1991-10-29 1993-06-29 Vlsi Technology, Inc. Logic level shifter for 3 volt cmos to 5 volt cmos or ttl
US5298807A (en) * 1991-12-23 1994-03-29 Intel Corporation Buffer circuitry for transferring signals from TTL circuitry to dual range CMOS circuitry
JPH06209252A (ja) * 1992-09-29 1994-07-26 Siemens Ag Ｃｍｏｓ入力段
WO1995009483A1 (en) * 1993-09-30 1995-04-06 Macronix International Co., Ltd. Improved supply voltage detection circuit
KR0130037B1 (ko) * 1993-12-18 1998-04-06 김광호 동작전압의 변동에 대응 가능한 반도체집적회로의 입력버퍼회로
US5534801A (en) * 1994-01-24 1996-07-09 Advanced Micro Devices, Inc. Apparatus and method for automatic sense and establishment of 5V and 3.3V operation
JP3410547B2 (ja) * 1994-05-24 2003-05-26 三菱電機株式会社 半導体装置の出力回路
US5497119A (en) * 1994-06-01 1996-03-05 Intel Corporation High precision voltage regulation circuit for programming multilevel flash memory
US5477172A (en) * 1994-12-12 1995-12-19 Advanced Micro Devices, Inc. Configurable input buffer dependent on supply voltage
US5528172A (en) * 1994-12-27 1996-06-18 Honeywell Inc. Adjustable voltage level shifter
US5568062A (en) * 1995-07-14 1996-10-22 Kaplinsky; Cecil H. Low noise tri-state output buffer

Also Published As

Publication number Publication date
EP0974145A1 (de) 2000-01-26
KR100343028B1 (ko) 2002-07-02
EP0974145A4 (de) 2001-04-18
US5896338A (en) 1999-04-20
KR20010006232A (ko) 2001-01-26
WO1998047149A1 (en) 1998-10-22
EP0974145B1 (de) 2004-09-29
DE69826645T2 (de) 2005-10-06
MY116192A (en) 2003-11-28
AU6887998A (en) 1998-11-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806