DE69818183D1 - SOI-MOSFET und Verfahren zu dessen Herstellung - Google Patents

SOI-MOSFET und Verfahren zu dessen Herstellung

Info

Publication number
DE69818183D1
DE69818183D1 DE69818183T DE69818183T DE69818183D1 DE 69818183 D1 DE69818183 D1 DE 69818183D1 DE 69818183 T DE69818183 T DE 69818183T DE 69818183 T DE69818183 T DE 69818183T DE 69818183 D1 DE69818183 D1 DE 69818183D1
Authority
DE
Germany
Prior art keywords
production
soi mosfet
soi
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69818183T
Other languages
English (en)
Other versions
DE69818183T2 (de
Inventor
Alberto O Adan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE69818183D1 publication Critical patent/DE69818183D1/de
Application granted granted Critical
Publication of DE69818183T2 publication Critical patent/DE69818183T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
DE69818183T 1997-09-05 1998-06-29 SOI-MOSFET und Verfahren zu dessen Herstellung Expired - Fee Related DE69818183T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP24148297 1997-09-05
JP24148297A JP3337953B2 (ja) 1997-09-05 1997-09-05 Soi・mosfet及びその製造方法

Publications (2)

Publication Number Publication Date
DE69818183D1 true DE69818183D1 (de) 2003-10-23
DE69818183T2 DE69818183T2 (de) 2004-06-03

Family

ID=17074977

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69818183T Expired - Fee Related DE69818183T2 (de) 1997-09-05 1998-06-29 SOI-MOSFET und Verfahren zu dessen Herstellung

Country Status (6)

Country Link
US (1) US6288425B1 (de)
EP (1) EP0902482B1 (de)
JP (1) JP3337953B2 (de)
KR (1) KR100329055B1 (de)
DE (1) DE69818183T2 (de)
TW (1) TW500258U (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6156589A (en) * 1998-09-03 2000-12-05 Micron Technology, Inc. Compact SOI body contact link
US6740912B1 (en) * 1999-06-24 2004-05-25 Agere Systems Inc. Semiconductor device free of LLD regions
US6362082B1 (en) * 1999-06-28 2002-03-26 Intel Corporation Methodology for control of short channel effects in MOS transistors
JP3573056B2 (ja) * 1999-07-16 2004-10-06 セイコーエプソン株式会社 半導体装置、半導体ゲートアレイおよび電気光学装置および電子機器
JP2001036092A (ja) 1999-07-23 2001-02-09 Mitsubishi Electric Corp 半導体装置
KR100343288B1 (ko) * 1999-10-25 2002-07-15 윤종용 에스오아이 모스 트랜지스터의 플로팅 바디 효과를제거하기 위한 에스오아이 반도체 집적회로 및 그 제조방법
US6521959B2 (en) 1999-10-25 2003-02-18 Samsung Electronics Co., Ltd. SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same
JP3608456B2 (ja) * 1999-12-08 2005-01-12 セイコーエプソン株式会社 Soi構造のmis電界効果トランジスタの製造方法
JP3504212B2 (ja) * 2000-04-04 2004-03-08 シャープ株式会社 Soi構造の半導体装置
KR100365411B1 (ko) * 2000-06-30 2002-12-18 주식회사 하이닉스반도체 절연층상의 실리콘 금속 산화물 전계 효과 트랜지스터의제조 방법
US6512269B1 (en) * 2000-09-07 2003-01-28 International Business Machines Corporation High-voltage high-speed SOI MOSFET
US6479866B1 (en) * 2000-11-14 2002-11-12 Advanced Micro Devices, Inc. SOI device with self-aligned selective damage implant, and method
CN1147935C (zh) * 2000-12-18 2004-04-28 黄敞 互补偶载场效应晶体管及其片上系统
JP2002185008A (ja) * 2000-12-19 2002-06-28 Hitachi Ltd 薄膜トランジスタ
US6538284B1 (en) * 2001-02-02 2003-03-25 Advanced Micro Devices, Inc. SOI device with body recombination region, and method
US6509613B1 (en) * 2001-05-04 2003-01-21 Advanced Micro Devices, Inc. Self-aligned floating body control for SOI device through leakage enhanced buried oxide
US7122863B1 (en) 2001-05-07 2006-10-17 Advanced Micro Devices, Inc. SOI device with structure for enhancing carrier recombination and method of fabricating same
US6528851B1 (en) * 2001-05-31 2003-03-04 Advanced Micro Devices, Inc. Post-silicidation implant for introducing recombination center in body of SOI MOSFET
US6407428B1 (en) * 2001-06-15 2002-06-18 Advanced Micro Devices, Inc. Field effect transistor with a buried and confined metal plate to control short channel effects
JP4134545B2 (ja) 2001-10-02 2008-08-20 日本電気株式会社 半導体装置
US6828632B2 (en) * 2002-07-18 2004-12-07 Micron Technology, Inc. Stable PD-SOI devices and methods
KR100985581B1 (ko) 2003-04-30 2010-10-06 매그나칩 반도체 유한회사 반도체 소자 및 그 제조방법
EP1739738A3 (de) * 2005-06-30 2009-04-01 STMicroelectronics (Crolles 2) SAS Speicherzelle mit einem MOS-Transistor mit isoliertem Körper mit verstärktem Speichereffekt
KR100650901B1 (ko) * 2005-12-29 2006-11-28 동부일렉트로닉스 주식회사 매립 게이트를 갖는 금속 산화물 반도체 트랜지스터
DE102005063092B3 (de) * 2005-12-30 2007-07-19 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit einer Kontaktstruktur mit erhöhter Ätzselektivität
US7704844B2 (en) * 2007-10-04 2010-04-27 International Business Machines Corporation High performance MOSFET
GB201202128D0 (en) * 2012-02-08 2012-03-21 Univ Leeds Novel material
CN113363323B (zh) * 2020-03-05 2023-08-18 苏州大学 单栅场效应晶体管器件及调控其驱动电流的方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5678156A (en) 1979-11-30 1981-06-26 Fujitsu Ltd Charge pump semiconductor memory
US4563805A (en) * 1984-03-08 1986-01-14 Standard Telephones And Cables, Plc Manufacture of MOSFET with metal silicide contact
JPH0626252B2 (ja) 1985-12-06 1994-04-06 株式会社日立製作所 半導体装置
US4965213A (en) 1988-02-01 1990-10-23 Texas Instruments Incorporated Silicon-on-insulator transistor with body node to source node connection
JPH02178965A (ja) 1988-12-29 1990-07-11 Nippondenso Co Ltd 絶縁分離型電界効果半導体装置
US5296727A (en) 1990-08-24 1994-03-22 Fujitsu Limited Double gate FET and process for manufacturing same
JPH05218425A (ja) 1992-01-31 1993-08-27 Nippon Telegr & Teleph Corp <Ntt> 電界効果型半導体装置およびその製造方法
TW222345B (en) * 1992-02-25 1994-04-11 Semicondustor Energy Res Co Ltd Semiconductor and its manufacturing method
US5463237A (en) 1993-11-04 1995-10-31 Victor Company Of Japan, Ltd. MOSFET device having depletion layer
JP3222380B2 (ja) 1996-04-25 2001-10-29 シャープ株式会社 電界効果トランジスタ、および、cmosトランジスタ

Also Published As

Publication number Publication date
US6288425B1 (en) 2001-09-11
JP3337953B2 (ja) 2002-10-28
JPH1187719A (ja) 1999-03-30
KR100329055B1 (ko) 2002-08-21
KR19990029240A (ko) 1999-04-26
EP0902482B1 (de) 2003-09-17
TW500258U (en) 2002-08-21
EP0902482A1 (de) 1999-03-17
DE69818183T2 (de) 2004-06-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee