DE69813787D1 - Verfahren und vorrichtung zum aktivieren von verunreinigungen in einem halbleiter - Google Patents

Verfahren und vorrichtung zum aktivieren von verunreinigungen in einem halbleiter

Info

Publication number
DE69813787D1
DE69813787D1 DE69813787T DE69813787T DE69813787D1 DE 69813787 D1 DE69813787 D1 DE 69813787D1 DE 69813787 T DE69813787 T DE 69813787T DE 69813787 T DE69813787 T DE 69813787T DE 69813787 D1 DE69813787 D1 DE 69813787D1
Authority
DE
Germany
Prior art keywords
semiconductor
activating impurities
activating
impurities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69813787T
Other languages
English (en)
Other versions
DE69813787T2 (de
Inventor
Akihisa Yoshida
Masatoshi Kitagawa
Masao Uchida
Makoto Kitabatake
Tsuneo Mitsuyu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69813787D1 publication Critical patent/DE69813787D1/de
Publication of DE69813787T2 publication Critical patent/DE69813787T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Recrystallisation Techniques (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE69813787T 1997-11-28 1998-11-30 Verfahren und vorrichtung zum aktivieren von verunreinigungen in einem halbleiter Expired - Fee Related DE69813787T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP32777197 1997-11-28
PCT/JP1998/005383 WO1999028960A1 (fr) 1997-11-28 1998-11-30 Procede et dispositif d'activation d'impuretes dans des semi-conducteurs

Publications (2)

Publication Number Publication Date
DE69813787D1 true DE69813787D1 (de) 2003-05-28
DE69813787T2 DE69813787T2 (de) 2003-10-23

Family

ID=18202809

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69813787T Expired - Fee Related DE69813787T2 (de) 1997-11-28 1998-11-30 Verfahren und vorrichtung zum aktivieren von verunreinigungen in einem halbleiter

Country Status (7)

Country Link
US (2) US6255201B1 (de)
EP (1) EP0971397B1 (de)
KR (1) KR100413569B1 (de)
CN (1) CN1110068C (de)
CA (1) CA2278578A1 (de)
DE (1) DE69813787T2 (de)
WO (1) WO1999028960A1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7749910B2 (en) * 2001-07-04 2010-07-06 S.O.I.Tec Silicon On Insulator Technologies Method of reducing the surface roughness of a semiconductor wafer
US7883628B2 (en) * 2001-07-04 2011-02-08 S.O.I.Tec Silicon On Insulator Technologies Method of reducing the surface roughness of a semiconductor wafer
FR2827078B1 (fr) * 2001-07-04 2005-02-04 Soitec Silicon On Insulator Procede de diminution de rugosite de surface
US6767799B2 (en) * 2001-12-28 2004-07-27 Semiconductor Energy Laboratory Co., Ltd. Laser beam irradiation method
JP2004158627A (ja) * 2002-11-06 2004-06-03 Renesas Technology Corp 半導体装置の製造方法
KR20040046644A (ko) * 2002-11-28 2004-06-05 이형규 레이저 활성화를 이용한 화합물 반도체 소자의 제조방법
DE10308646B4 (de) * 2003-01-31 2008-07-10 Osram Opto Semiconductors Gmbh Halbleitersubstrat für optoelektronische Bauelemente und Verfahren zu dessen Herstellung
US20050104072A1 (en) * 2003-08-14 2005-05-19 Slater David B.Jr. Localized annealing of metal-silicon carbide ohmic contacts and devices so formed
US20050106876A1 (en) * 2003-10-09 2005-05-19 Taylor Charles A.Ii Apparatus and method for real time measurement of substrate temperatures for use in semiconductor growth and wafer processing
KR100610016B1 (ko) * 2004-11-18 2006-08-08 삼성전자주식회사 반도체 디바이스 제조를 위한 불순물 원자 활성화 장치 및그 방법
US7951632B1 (en) * 2005-01-26 2011-05-31 University Of Central Florida Optical device and method of making
US20060267021A1 (en) * 2005-05-27 2006-11-30 General Electric Company Power devices and methods of manufacture
US7851343B2 (en) * 2007-06-14 2010-12-14 Cree, Inc. Methods of forming ohmic layers through ablation capping layers
TWI543264B (zh) * 2010-03-31 2016-07-21 應用材料股份有限公司 雷射光束定位系統
JP5569376B2 (ja) * 2010-12-07 2014-08-13 住友電気工業株式会社 半導体装置の製造方法
CN102501077B (zh) * 2011-11-15 2014-05-14 吉林大学 一种仿生耐磨高可靠性铸铁滚动机床导轨及其制作方法
CN106469647B (zh) * 2015-08-21 2019-03-19 南京励盛半导体科技有限公司 一种碳化硅半导体器件的掺杂制造工艺
CN106469646B (zh) * 2015-08-21 2019-08-06 南京励盛半导体科技有限公司 一种碳化硅器件用离子注入来形成高掺杂的制造方法
KR20240095343A (ko) 2021-11-10 2024-06-25 실라나 유브이 테크놀로지스 피티이 리미티드 에피택셜 산화물 물질, 구조 및 소자

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3792379A (en) * 1972-03-07 1974-02-12 Bell Telephone Labor Inc Millimeter wave devices utilizing electrically polarized media
JPS4963419A (de) * 1972-10-18 1974-06-19
JPS57102016A (en) * 1980-12-17 1982-06-24 Hitachi Ltd Pattern generator
US4379727A (en) 1981-07-08 1983-04-12 International Business Machines Corporation Method of laser annealing of subsurface ion implanted regions
US4439245A (en) * 1982-01-25 1984-03-27 Rca Corporation Electromagnetic radiation annealing of semiconductor material
USRE33274E (en) * 1985-09-13 1990-07-24 Xerox Corporation Selective disordering of well structures by laser annealing
JPH0824104B2 (ja) 1991-03-18 1996-03-06 株式会社半導体エネルギー研究所 半導体材料およびその作製方法
JP3118307B2 (ja) * 1992-04-20 2000-12-18 株式会社トクヤマ α−メチル−2−フリルアクリル酸無水物
JP3437863B2 (ja) 1993-01-18 2003-08-18 株式会社半導体エネルギー研究所 Mis型半導体装置の作製方法
EP0652308B1 (de) * 1993-10-14 2002-03-27 Neuralsystems Corporation Verfahren und Vorrichtung zur Herstellung eines Einkristallinen dünnen Films
JPH08148443A (ja) * 1994-11-24 1996-06-07 Agency Of Ind Science & Technol 不純物のイオン注入方法
US5930591A (en) * 1997-04-23 1999-07-27 Litton Systems Canada Limited High resolution, low voltage flat-panel radiation imaging sensors
US6201253B1 (en) * 1998-10-22 2001-03-13 Lsi Logic Corporation Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system

Also Published As

Publication number Publication date
DE69813787T2 (de) 2003-10-23
US6577386B2 (en) 2003-06-10
EP0971397A4 (de) 2000-08-30
EP0971397B1 (de) 2003-04-23
US20010027001A1 (en) 2001-10-04
CN1244948A (zh) 2000-02-16
CA2278578A1 (en) 1999-06-10
KR20000070291A (ko) 2000-11-25
WO1999028960A1 (fr) 1999-06-10
KR100413569B1 (ko) 2003-12-31
EP0971397A1 (de) 2000-01-12
US6255201B1 (en) 2001-07-03
CN1110068C (zh) 2003-05-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee