DE69735907D1 - Verfahren zur Identifizierung eines Peripheriegerätes in einem Halbleitergerät - Google Patents

Verfahren zur Identifizierung eines Peripheriegerätes in einem Halbleitergerät

Info

Publication number
DE69735907D1
DE69735907D1 DE69735907T DE69735907T DE69735907D1 DE 69735907 D1 DE69735907 D1 DE 69735907D1 DE 69735907 T DE69735907 T DE 69735907T DE 69735907 T DE69735907 T DE 69735907T DE 69735907 D1 DE69735907 D1 DE 69735907D1
Authority
DE
Germany
Prior art keywords
identifying
semiconductor device
peripheral device
peripheral
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69735907T
Other languages
English (en)
Other versions
DE69735907T2 (de
Inventor
Hiroshi Kume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lapis Semiconductor Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE69735907D1 publication Critical patent/DE69735907D1/de
Application granted granted Critical
Publication of DE69735907T2 publication Critical patent/DE69735907T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4411Configuring for operating with peripheral devices; Loading of device drivers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/54Link editing before load time
DE69735907T 1996-04-26 1997-03-27 Verfahren zur Identifizierung eines Peripheriegerätes in einem Halbleitergerät Expired - Lifetime DE69735907T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10723396A JP3673015B2 (ja) 1996-04-26 1996-04-26 半導体装置における周辺デバイス識別方法
JP10723396 1996-04-26

Publications (2)

Publication Number Publication Date
DE69735907D1 true DE69735907D1 (de) 2006-06-22
DE69735907T2 DE69735907T2 (de) 2006-11-30

Family

ID=14453872

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69734910T Expired - Lifetime DE69734910T2 (de) 1996-04-26 1997-03-27 Verfahren zur Identifizierung eines Peripheriegerätes in einem Halbleitergerät
DE69735907T Expired - Lifetime DE69735907T2 (de) 1996-04-26 1997-03-27 Verfahren zur Identifizierung eines Peripheriegerätes in einem Halbleitergerät

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69734910T Expired - Lifetime DE69734910T2 (de) 1996-04-26 1997-03-27 Verfahren zur Identifizierung eines Peripheriegerätes in einem Halbleitergerät

Country Status (8)

Country Link
US (1) US6032254A (de)
EP (2) EP1571551B1 (de)
JP (1) JP3673015B2 (de)
KR (1) KR100441533B1 (de)
CN (1) CN1166652A (de)
CA (1) CA2201201C (de)
DE (2) DE69734910T2 (de)
SG (2) SG88761A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI980465A (fi) 1998-02-27 1999-08-28 Nokia Mobile Phones Ltd Menetelmä palveluiden asentamiseksi
US6393585B1 (en) 1998-12-23 2002-05-21 Scientific-Atlanta, Inc. Method and apparatus for restoring operating systems in a set-top box environment
DE10204172A1 (de) * 2002-02-01 2003-08-07 Heidenhain Gmbh Dr Johannes Verfahren zur Überprüfung einer Schnittstelle
US7551165B2 (en) * 2004-03-12 2009-06-23 International Business Machines Corporation Updatable electronic labeling of electronic devices
JP2006128975A (ja) * 2004-10-28 2006-05-18 Matsushita Electric Ind Co Ltd 半導体装置
TWI459204B (zh) * 2009-03-03 2014-11-01 Htc Corp 電子裝置、電子系統以及周邊裝置自動偵測與辨識方法
KR101139630B1 (ko) * 2010-12-09 2012-05-30 한양대학교 산학협력단 식별키 생성 장치 및 방법
KR101118826B1 (ko) 2011-02-15 2012-04-20 한양대학교 산학협력단 물리적 공격을 방어하는 암호화 장치 및 암호화 방법
US9569957B2 (en) * 2012-03-08 2017-02-14 Htc Corporation Systems, devices and methods involving device identification
KR102186475B1 (ko) 2013-12-31 2020-12-03 주식회사 아이씨티케이 홀딩스 랜덤한 디지털 값을 생성하는 장치 및 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3881174A (en) * 1974-01-18 1975-04-29 Process Computer Systems Inc Peripheral interrupt apparatus for digital computer system
KR860007588A (ko) * 1985-03-25 1986-10-15 미쓰다 가쓰시게 데이터 처리장치
US5325513A (en) * 1987-02-23 1994-06-28 Kabushiki Kaisha Toshiba Apparatus for selectively accessing different memory types by storing memory correlation information in preprocessing mode and using the information in processing mode
JP2896148B2 (ja) * 1988-09-29 1999-05-31 株式会社東芝 制御情報のリードライト制御方式
US5430859A (en) * 1991-07-26 1995-07-04 Sundisk Corporation Solid state memory system including plural memory chips and a serialized bus
US5345564A (en) * 1992-03-31 1994-09-06 Zilog, Inc. Serial communication peripheral integrated electronic circuit that recognizes its unique address before the entire circuit is enabled
US5603055A (en) * 1994-01-27 1997-02-11 Vlsi Technology, Inc. Single shared ROM for storing keyboard microcontroller code portion and CPU code portion and disabling access to a portion while accessing to the other
US5671413A (en) * 1994-10-31 1997-09-23 Intel Corporation Method and apparatus for providing basic input/output services in a computer
CA2159979C (en) * 1995-10-05 1999-05-25 Arthur Lai Methology to link any pci rom based device using a single software or hardware interrupt vector in pc system at runtime

Also Published As

Publication number Publication date
CA2201201A1 (en) 1997-10-26
EP0803802A2 (de) 1997-10-29
EP1571551A1 (de) 2005-09-07
DE69734910T2 (de) 2006-08-17
SG55294A1 (en) 1998-12-21
JP3673015B2 (ja) 2005-07-20
EP0803802A3 (de) 2002-06-19
DE69735907T2 (de) 2006-11-30
KR970072438A (ko) 1997-11-07
DE69734910D1 (de) 2006-01-26
EP1571551B1 (de) 2006-05-17
CA2201201C (en) 2005-05-31
US6032254A (en) 2000-02-29
EP0803802B1 (de) 2005-12-21
SG88761A1 (en) 2002-05-21
JPH09293040A (ja) 1997-11-11
KR100441533B1 (ko) 2004-10-14
CN1166652A (zh) 1997-12-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: OKI SEMICONDUCTOR CO.,LTD., TOKYO, JP