DE69728953D1 - Verfahren zur Herstellung einer Halbleiter-Anordnung - Google Patents

Verfahren zur Herstellung einer Halbleiter-Anordnung

Info

Publication number
DE69728953D1
DE69728953D1 DE69728953T DE69728953T DE69728953D1 DE 69728953 D1 DE69728953 D1 DE 69728953D1 DE 69728953 T DE69728953 T DE 69728953T DE 69728953 T DE69728953 T DE 69728953T DE 69728953 D1 DE69728953 D1 DE 69728953D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69728953T
Other languages
English (en)
Other versions
DE69728953T2 (de
Inventor
Yoshihiko Fukumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69728953D1 publication Critical patent/DE69728953D1/de
Publication of DE69728953T2 publication Critical patent/DE69728953T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02074Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
DE69728953T 1996-11-29 1997-11-27 Verfahren zur Herstellung einer Halbleiter-Anordnung Expired - Lifetime DE69728953T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31956896 1996-11-29
JP31956896 1996-11-29

Publications (2)

Publication Number Publication Date
DE69728953D1 true DE69728953D1 (de) 2004-06-09
DE69728953T2 DE69728953T2 (de) 2005-04-14

Family

ID=18111728

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69728953T Expired - Lifetime DE69728953T2 (de) 1996-11-29 1997-11-27 Verfahren zur Herstellung einer Halbleiter-Anordnung

Country Status (6)

Country Link
EP (1) EP0845805B1 (de)
KR (1) KR100426184B1 (de)
CN (1) CN1184327A (de)
DE (1) DE69728953T2 (de)
HK (1) HK1009557A1 (de)
TW (1) TW364165B (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1122591C (zh) * 1999-12-23 2003-10-01 财团法人工业技术研究院 抛光后线上清洗方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0691986B2 (ja) * 1987-11-27 1994-11-16 大日本スクリーン製造株式会社 基板洗浄方法
JP2653511B2 (ja) * 1989-03-30 1997-09-17 株式会社東芝 半導体装置の洗浄方法及びその洗浄装置
JP3155652B2 (ja) * 1993-09-16 2001-04-16 東京応化工業株式会社 基板洗浄装置
EP1080797A3 (de) * 1994-06-28 2005-10-05 Ebara Corporation Verfahren und Vorrichtung für die Reinigung von Werkstücken
FR2722511B1 (fr) * 1994-07-15 1999-04-02 Ontrak Systems Inc Procede pour enlever les metaux dans un dispositif de recurage
JP3382467B2 (ja) * 1995-09-14 2003-03-04 キヤノン株式会社 アクティブマトリクス基板の製造方法
KR970072138A (ko) * 1996-04-24 1997-11-07 김광호 웨이퍼 세정장치 및 세정방법

Also Published As

Publication number Publication date
CN1184327A (zh) 1998-06-10
KR19980042930A (ko) 1998-08-17
EP0845805A2 (de) 1998-06-03
EP0845805A3 (de) 1999-02-17
TW364165B (en) 1999-07-11
HK1009557A1 (en) 1999-06-04
DE69728953T2 (de) 2005-04-14
KR100426184B1 (ko) 2004-06-24
EP0845805B1 (de) 2004-05-06

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Legal Events

Date Code Title Description
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