DE69706043T2 - Integrierte schaltungsschutzanordnung und verfahren - Google Patents

Integrierte schaltungsschutzanordnung und verfahren

Info

Publication number
DE69706043T2
DE69706043T2 DE69706043T DE69706043T DE69706043T2 DE 69706043 T2 DE69706043 T2 DE 69706043T2 DE 69706043 T DE69706043 T DE 69706043T DE 69706043 T DE69706043 T DE 69706043T DE 69706043 T2 DE69706043 T2 DE 69706043T2
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit protection
protection
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69706043T
Other languages
English (en)
Other versions
DE69706043D1 (de
Inventor
K Cole
P Yakura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Logic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSI Logic Corp filed Critical LSI Logic Corp
Application granted granted Critical
Publication of DE69706043D1 publication Critical patent/DE69706043D1/de
Publication of DE69706043T2 publication Critical patent/DE69706043T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/901—MOSFET substrate bias
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/906—Dram with capacitor electrodes used for accessing, e.g. bit line is capacitor plate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/908—Dram configuration with transistors and capacitors of pairs of cells along a straight line between adjacent bit lines
DE69706043T 1996-03-28 1997-03-26 Integrierte schaltungsschutzanordnung und verfahren Expired - Lifetime DE69706043T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/623,470 US5861652A (en) 1996-03-28 1996-03-28 Method and apparatus for protecting functions imbedded within an integrated circuit from reverse engineering
PCT/GB1997/000951 WO1997036326A1 (en) 1996-03-28 1997-03-26 Integrated circuit protection device and method

Publications (2)

Publication Number Publication Date
DE69706043D1 DE69706043D1 (de) 2001-09-13
DE69706043T2 true DE69706043T2 (de) 2001-12-06

Family

ID=24498198

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69706043T Expired - Lifetime DE69706043T2 (de) 1996-03-28 1997-03-26 Integrierte schaltungsschutzanordnung und verfahren

Country Status (6)

Country Link
US (1) US5861652A (de)
EP (1) EP0892988B1 (de)
AU (1) AU2301997A (de)
DE (1) DE69706043T2 (de)
TW (1) TW331036B (de)
WO (1) WO1997036326A1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
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DE19639033C1 (de) * 1996-09-23 1997-08-07 Siemens Ag Analysierschutz für einen Halbleiterchip
JP3515012B2 (ja) 1999-04-23 2004-04-05 シャープ株式会社 半導体装置およびその製造方法
US6414884B1 (en) * 2000-02-04 2002-07-02 Lucent Technologies Inc. Method and apparatus for securing electronic circuits
JP3553457B2 (ja) * 2000-03-31 2004-08-11 シャープ株式会社 半導体装置およびその製造方法
DE50013937D1 (de) * 2000-08-21 2007-02-15 Infineon Technologies Ag Vorrichtung zum Schutz einer integrierten Schaltung
DE10058078C1 (de) * 2000-11-23 2002-04-11 Infineon Technologies Ag Integrierte Schaltungsanordnung mit Analysierschutz und Verfahren zur Herstellung der Anordnung
DE10065339B4 (de) * 2000-12-27 2004-04-15 Infineon Technologies Ag Kapazitiver Sensor als Schutzvorrichtung gegen Angriffe auf einen Sicherheitschip
DE10109220A1 (de) * 2001-02-26 2002-09-12 Infineon Technologies Ag Integrierte Schaltung mit einer Stützkapazität
DE10119782C1 (de) * 2001-04-23 2002-10-17 Infineon Technologies Ag Verfahren zum Schutz eines IC vor Auslesen sicherheitsrelevanter Daten (Reverse-Engineering)
DE10120520A1 (de) * 2001-04-26 2002-11-14 Infineon Technologies Ag Halbleiterbauelement und Herstellungsverfahren
DE10155802B4 (de) * 2001-11-14 2006-03-02 Infineon Technologies Ag Halbleiterchip mit FIB-Schutz
US7525330B2 (en) * 2001-11-28 2009-04-28 Nxp, B.V. Semiconductor device, card, system, and methods of initializing and checking the authenticity and the identity of the semiconductor device
DE10345240A1 (de) * 2003-09-29 2005-05-04 Infineon Technologies Ag Integrierte Schaltung mit Strahlungssensoranordnung
JP4462903B2 (ja) * 2003-11-18 2010-05-12 パナソニック株式会社 半導体ウェハ
US7555787B2 (en) * 2004-02-24 2009-06-30 Nxp B.V. IC intrusion detection
CN100370597C (zh) * 2004-07-09 2008-02-20 北京大学 信息安全集成电路可测性与安全性设计方法
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
DE102007051788A1 (de) * 2007-10-30 2009-05-14 Giesecke & Devrient Gmbh Halbleiterchip mit einer Schutzschicht und Verfahren zum Betrieb eines Halbleiterchip
US9003559B2 (en) * 2008-07-29 2015-04-07 International Business Machines Corporation Continuity check monitoring for microchip exploitation detection
US8332659B2 (en) * 2008-07-29 2012-12-11 International Business Machines Corporation Signal quality monitoring to defeat microchip exploitation
US8214657B2 (en) * 2008-07-29 2012-07-03 International Business Machines Corporation Resistance sensing for defeating microchip exploitation
US8172140B2 (en) * 2008-07-29 2012-05-08 International Business Machines Corporation Doped implant monitoring for microchip tamper detection
US7952478B2 (en) * 2008-07-29 2011-05-31 International Business Machines Corporation Capacitance-based microchip exploitation detection
US11139256B2 (en) 2019-08-21 2021-10-05 Micron Technology, Inc. Tamper-resistant integrated circuits, and related methods
US11621234B2 (en) * 2020-03-27 2023-04-04 Semiconductor Components Industries, Llc Chip tampering detector

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Publication number Priority date Publication date Assignee Title
US3576478A (en) * 1969-07-22 1971-04-27 Philco Ford Corp Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode
JPS543480A (en) * 1977-06-09 1979-01-11 Fujitsu Ltd Manufacture of semiconductor device
US4251688A (en) * 1979-01-15 1981-02-17 Ana Maria Furner Audio-digital processing system for demultiplexing stereophonic/quadriphonic input audio signals into 4-to-72 output audio signals
JPS58135665A (ja) * 1982-02-08 1983-08-12 Nippon Telegr & Teleph Corp <Ntt> 半導体記憶セル
EP0098417A3 (de) * 1982-06-15 1986-12-30 Kabushiki Kaisha Toshiba Halbleiterspeicheranordnung
JPS61127159A (ja) * 1984-11-26 1986-06-14 Nippon Texas Instr Kk スタテイツク形記憶素子
US4593384A (en) * 1984-12-21 1986-06-03 Ncr Corporation Security device for the secure storage of sensitive data
JPS61187362A (ja) * 1985-02-15 1986-08-21 Nec Corp 半導体集積回路装置
JPS61214555A (ja) * 1985-03-20 1986-09-24 Hitachi Ltd 半導体装置
JP2545527B2 (ja) * 1987-01-23 1996-10-23 沖電気工業株式会社 半導体装置
FR2617979B1 (fr) * 1987-07-10 1989-11-10 Thomson Semiconducteurs Dispositif de detection de la depassivation d'un circuit integre
US4766516A (en) * 1987-09-24 1988-08-23 Hughes Aircraft Company Method and apparatus for securing integrated circuits from unauthorized copying and use
US4920402A (en) * 1988-02-15 1990-04-24 Mitsubishi Denki Kabushiki Kaisha Integrated circuit device
US4933898A (en) * 1989-01-12 1990-06-12 General Instrument Corporation Secure integrated circuit chip with conductive shield
EP0494913A4 (en) * 1989-10-03 1993-01-20 University Of Technology, Sydney Electro-active cradle circuits for the detection of access or penetration
DE4018688C2 (de) * 1990-06-11 1998-07-02 Siemens Ag Verfahren zum Schutz einer integrierten Schaltung gegen das Auslesen sensitiver Daten
JP3083547B2 (ja) * 1990-07-12 2000-09-04 株式会社日立製作所 半導体集積回路装置
US5053992A (en) * 1990-10-04 1991-10-01 General Instrument Corporation Prevention of inspection of secret data stored in encapsulated integrated circuit chip
US5202591A (en) * 1991-08-09 1993-04-13 Hughes Aircraft Company Dynamic circuit disguise for microelectronic integrated digital logic circuits
US5389738A (en) * 1992-05-04 1995-02-14 Motorola, Inc. Tamperproof arrangement for an integrated circuit device

Also Published As

Publication number Publication date
WO1997036326A1 (en) 1997-10-02
EP0892988B1 (de) 2001-08-08
TW331036B (en) 1998-05-01
US5861652A (en) 1999-01-19
AU2301997A (en) 1997-10-17
EP0892988A1 (de) 1999-01-27
DE69706043D1 (de) 2001-09-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: FIENER, J., PAT.-ANW., 87719 MINDELHEIM