DE69701571T2 - Realisierungsmethode einer dünnschicht aus festem material und anwendung dieser methode - Google Patents
Realisierungsmethode einer dünnschicht aus festem material und anwendung dieser methodeInfo
- Publication number
- DE69701571T2 DE69701571T2 DE69701571T DE69701571T DE69701571T2 DE 69701571 T2 DE69701571 T2 DE 69701571T2 DE 69701571 T DE69701571 T DE 69701571T DE 69701571 T DE69701571 T DE 69701571T DE 69701571 T2 DE69701571 T2 DE 69701571T2
- Authority
- DE
- Germany
- Prior art keywords
- substrate
- support
- thin film
- ions
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/48—Ion implantation
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/58—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Metallurgy (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Organic Chemistry (AREA)
- Mechanical Engineering (AREA)
- Materials Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Physical Vapour Deposition (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR9606085A FR2748850B1 (fr) | 1996-05-15 | 1996-05-15 | Procede de realisation d'un film mince de materiau solide et applications de ce procede |
| PCT/FR1997/000842 WO1997043461A1 (fr) | 1996-05-15 | 1997-05-13 | Procede de realisation d'un film mince de materiau solide et applications de ce procede |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69701571D1 DE69701571D1 (de) | 2000-05-04 |
| DE69701571T2 true DE69701571T2 (de) | 2000-10-19 |
Family
ID=9492176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69701571T Expired - Lifetime DE69701571T2 (de) | 1996-05-15 | 1997-05-13 | Realisierungsmethode einer dünnschicht aus festem material und anwendung dieser methode |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6190998B1 (enExample) |
| EP (1) | EP0902843B1 (enExample) |
| JP (2) | JP4659929B2 (enExample) |
| KR (1) | KR20000011051A (enExample) |
| DE (1) | DE69701571T2 (enExample) |
| FR (1) | FR2748850B1 (enExample) |
| WO (1) | WO1997043461A1 (enExample) |
Families Citing this family (88)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2748850B1 (fr) * | 1996-05-15 | 1998-07-24 | Commissariat Energie Atomique | Procede de realisation d'un film mince de materiau solide et applications de ce procede |
| US6582999B2 (en) | 1997-05-12 | 2003-06-24 | Silicon Genesis Corporation | Controlled cleavage process using pressurized fluid |
| US6033974A (en) * | 1997-05-12 | 2000-03-07 | Silicon Genesis Corporation | Method for controlled cleaving process |
| US20070122997A1 (en) * | 1998-02-19 | 2007-05-31 | Silicon Genesis Corporation | Controlled process and resulting device |
| US6048411A (en) | 1997-05-12 | 2000-04-11 | Silicon Genesis Corporation | Silicon-on-silicon hybrid wafer assembly |
| FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
| US7227176B2 (en) | 1998-04-10 | 2007-06-05 | Massachusetts Institute Of Technology | Etch stop layer system |
| US6291314B1 (en) * | 1998-06-23 | 2001-09-18 | Silicon Genesis Corporation | Controlled cleavage process and device for patterned films using a release layer |
| US6242770B1 (en) | 1998-08-31 | 2001-06-05 | Gary Bela Bronner | Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method for forming the same |
| FR2784796B1 (fr) | 1998-10-15 | 2001-11-23 | Commissariat Energie Atomique | Procede de realisation d'une couche de materiau enterree dans un autre materiau |
| AU6905000A (en) * | 1999-08-10 | 2001-03-05 | Silicon Genesis Corporation | A cleaving process to fabricate multilayered substrates using low implantation doses |
| US6263941B1 (en) | 1999-08-10 | 2001-07-24 | Silicon Genesis Corporation | Nozzle for cleaving substrates |
| US6500732B1 (en) | 1999-08-10 | 2002-12-31 | Silicon Genesis Corporation | Cleaving process to fabricate multilayered substrates using low implantation doses |
| US6333202B1 (en) * | 1999-08-26 | 2001-12-25 | International Business Machines Corporation | Flip FERAM cell and method to form same |
| US6391658B1 (en) * | 1999-10-26 | 2002-05-21 | International Business Machines Corporation | Formation of arrays of microelectronic elements |
| US6544862B1 (en) * | 2000-01-14 | 2003-04-08 | Silicon Genesis Corporation | Particle distribution method and resulting structure for a layer transfer process |
| FR2809867B1 (fr) * | 2000-05-30 | 2003-10-24 | Commissariat Energie Atomique | Substrat fragilise et procede de fabrication d'un tel substrat |
| FR2811807B1 (fr) * | 2000-07-12 | 2003-07-04 | Commissariat Energie Atomique | Procede de decoupage d'un bloc de materiau et de formation d'un film mince |
| US6573126B2 (en) * | 2000-08-16 | 2003-06-03 | Massachusetts Institute Of Technology | Process for producing semiconductor article using graded epitaxial growth |
| FR2840731B3 (fr) * | 2002-06-11 | 2004-07-30 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat comportant une couche utile en materiau semi-conducteur monocristallin de proprietes ameliorees |
| FR2894990B1 (fr) * | 2005-12-21 | 2008-02-22 | Soitec Silicon On Insulator | Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede |
| US8507361B2 (en) | 2000-11-27 | 2013-08-13 | Soitec | Fabrication of substrates with a useful layer of monocrystalline semiconductor material |
| US6940089B2 (en) * | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
| FR2823596B1 (fr) * | 2001-04-13 | 2004-08-20 | Commissariat Energie Atomique | Substrat ou structure demontable et procede de realisation |
| FR2823599B1 (fr) | 2001-04-13 | 2004-12-17 | Commissariat Energie Atomique | Substrat demomtable a tenue mecanique controlee et procede de realisation |
| US7045878B2 (en) * | 2001-05-18 | 2006-05-16 | Reveo, Inc. | Selectively bonded thin film layer and substrate layer for processing of useful devices |
| US6956268B2 (en) * | 2001-05-18 | 2005-10-18 | Reveo, Inc. | MEMS and method of manufacturing MEMS |
| US6875671B2 (en) * | 2001-09-12 | 2005-04-05 | Reveo, Inc. | Method of fabricating vertical integrated circuits |
| US7163826B2 (en) * | 2001-09-12 | 2007-01-16 | Reveo, Inc | Method of fabricating multi layer devices on buried oxide layer substrates |
| US7033910B2 (en) * | 2001-09-12 | 2006-04-25 | Reveo, Inc. | Method of fabricating multi layer MEMS and microfluidic devices |
| US20090065471A1 (en) * | 2003-02-10 | 2009-03-12 | Faris Sadeg M | Micro-nozzle, nano-nozzle, manufacturing methods therefor, applications therefor |
| FR2830983B1 (fr) | 2001-10-11 | 2004-05-14 | Commissariat Energie Atomique | Procede de fabrication de couches minces contenant des microcomposants |
| WO2003079415A2 (en) * | 2002-03-14 | 2003-09-25 | Amberwave Systems Corporation | Methods for fabricating strained layers on semiconductor substrates |
| KR100465630B1 (ko) * | 2002-05-03 | 2005-01-13 | 주식회사 하이닉스반도체 | 웨이퍼의 제조방법 |
| US7074623B2 (en) * | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
| US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US7307273B2 (en) * | 2002-06-07 | 2007-12-11 | Amberwave Systems Corporation | Control of strain in device layers by selective relaxation |
| US7335545B2 (en) * | 2002-06-07 | 2008-02-26 | Amberwave Systems Corporation | Control of strain in device layers by prevention of relaxation |
| US20030227057A1 (en) * | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
| US7176108B2 (en) | 2002-11-07 | 2007-02-13 | Soitec Silicon On Insulator | Method of detaching a thin film at moderate temperature after co-implantation |
| FR2847075B1 (fr) * | 2002-11-07 | 2005-02-18 | Commissariat Energie Atomique | Procede de formation d'une zone fragile dans un substrat par co-implantation |
| FR2848336B1 (fr) * | 2002-12-09 | 2005-10-28 | Commissariat Energie Atomique | Procede de realisation d'une structure contrainte destinee a etre dissociee |
| JP4794810B2 (ja) * | 2003-03-20 | 2011-10-19 | シャープ株式会社 | 半導体装置の製造方法 |
| FR2856844B1 (fr) | 2003-06-24 | 2006-02-17 | Commissariat Energie Atomique | Circuit integre sur puce de hautes performances |
| FR2857953B1 (fr) | 2003-07-21 | 2006-01-13 | Commissariat Energie Atomique | Structure empilee, et procede pour la fabriquer |
| FR2861497B1 (fr) | 2003-10-28 | 2006-02-10 | Soitec Silicon On Insulator | Procede de transfert catastrophique d'une couche fine apres co-implantation |
| US7354815B2 (en) * | 2003-11-18 | 2008-04-08 | Silicon Genesis Corporation | Method for fabricating semiconductor devices using strained silicon bearing material |
| US7772087B2 (en) | 2003-12-19 | 2010-08-10 | Commissariat A L'energie Atomique | Method of catastrophic transfer of a thin film after co-implantation |
| US20060113603A1 (en) * | 2004-12-01 | 2006-06-01 | Amberwave Systems Corporation | Hybrid semiconductor-on-insulator structures and related methods |
| US7393733B2 (en) * | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
| US10374120B2 (en) * | 2005-02-18 | 2019-08-06 | Koninklijke Philips N.V. | High efficiency solar cells utilizing wafer bonding and layer transfer to integrate non-lattice matched materials |
| WO2006116030A2 (en) * | 2005-04-21 | 2006-11-02 | Aonex Technologies, Inc. | Bonded intermediate substrate and method of making same |
| FR2886051B1 (fr) | 2005-05-20 | 2007-08-10 | Commissariat Energie Atomique | Procede de detachement d'un film mince |
| FR2889887B1 (fr) | 2005-08-16 | 2007-11-09 | Commissariat Energie Atomique | Procede de report d'une couche mince sur un support |
| FR2891281B1 (fr) | 2005-09-28 | 2007-12-28 | Commissariat Energie Atomique | Procede de fabrication d'un element en couches minces. |
| FR2899378B1 (fr) | 2006-03-29 | 2008-06-27 | Commissariat Energie Atomique | Procede de detachement d'un film mince par fusion de precipites |
| US20070243703A1 (en) * | 2006-04-14 | 2007-10-18 | Aonex Technololgies, Inc. | Processes and structures for epitaxial growth on laminate substrates |
| US7811900B2 (en) * | 2006-09-08 | 2010-10-12 | Silicon Genesis Corporation | Method and structure for fabricating solar cells using a thick layer transfer process |
| US9362439B2 (en) | 2008-05-07 | 2016-06-07 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled shear region |
| US8993410B2 (en) | 2006-09-08 | 2015-03-31 | Silicon Genesis Corporation | Substrate cleaving under controlled stress conditions |
| US8293619B2 (en) | 2008-08-28 | 2012-10-23 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled propagation |
| US8124499B2 (en) * | 2006-11-06 | 2012-02-28 | Silicon Genesis Corporation | Method and structure for thick layer transfer using a linear accelerator |
| US20080128641A1 (en) * | 2006-11-08 | 2008-06-05 | Silicon Genesis Corporation | Apparatus and method for introducing particles using a radio frequency quadrupole linear accelerator for semiconductor materials |
| FR2910179B1 (fr) | 2006-12-19 | 2009-03-13 | Commissariat Energie Atomique | PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART |
| US20080188011A1 (en) * | 2007-01-26 | 2008-08-07 | Silicon Genesis Corporation | Apparatus and method of temperature conrol during cleaving processes of thick film materials |
| WO2008123116A1 (en) * | 2007-03-26 | 2008-10-16 | Semiconductor Energy Laboratory Co., Ltd. | Soi substrate and method for manufacturing soi substrate |
| WO2008123117A1 (en) * | 2007-03-26 | 2008-10-16 | Semiconductor Energy Laboratory Co., Ltd. | Soi substrate and method for manufacturing soi substrate |
| FR2914492A1 (fr) * | 2007-03-27 | 2008-10-03 | Soitec Silicon On Insulator | Procede de fabrication de structures avec couches ferroelectriques reportees. |
| CN101657882B (zh) | 2007-04-13 | 2012-05-30 | 株式会社半导体能源研究所 | 显示器件、用于制造显示器件的方法、以及soi衬底 |
| US7732301B1 (en) | 2007-04-20 | 2010-06-08 | Pinnington Thomas Henry | Bonded intermediate substrate and method of making same |
| US20090278233A1 (en) * | 2007-07-26 | 2009-11-12 | Pinnington Thomas Henry | Bonded intermediate substrate and method of making same |
| FR2919427B1 (fr) * | 2007-07-26 | 2010-12-03 | Soitec Silicon On Insulator | Structure a reservoir de charges. |
| FR2922359B1 (fr) * | 2007-10-12 | 2009-12-18 | Commissariat Energie Atomique | Procede de fabrication d'une structure micro-electronique impliquant un collage moleculaire |
| FR2924272B1 (fr) * | 2007-11-28 | 2010-06-11 | Commissariat Energie Atomique | Procede de transfert de films |
| FR2925221B1 (fr) | 2007-12-17 | 2010-02-19 | Commissariat Energie Atomique | Procede de transfert d'une couche mince |
| FR2930674A1 (fr) * | 2008-04-29 | 2009-10-30 | Soitec Silicon On Insulator | Procede de traitement d'une heterostructure comportant une couche mince en materiau ferroelectrique |
| US8330126B2 (en) * | 2008-08-25 | 2012-12-11 | Silicon Genesis Corporation | Race track configuration and method for wafering silicon solar substrates |
| US7927975B2 (en) * | 2009-02-04 | 2011-04-19 | Micron Technology, Inc. | Semiconductor material manufacture |
| US8329557B2 (en) * | 2009-05-13 | 2012-12-11 | Silicon Genesis Corporation | Techniques for forming thin films by implantation with reduced channeling |
| FR2947098A1 (fr) | 2009-06-18 | 2010-12-24 | Commissariat Energie Atomique | Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince |
| FR2961719B1 (fr) * | 2010-06-24 | 2013-09-27 | Soitec Silicon On Insulator | Procede de traitement d'une piece en un materiau compose |
| JP5786393B2 (ja) * | 2011-03-18 | 2015-09-30 | 株式会社村田製作所 | 水晶デバイスの製造方法 |
| FR2978600B1 (fr) | 2011-07-25 | 2014-02-07 | Soitec Silicon On Insulator | Procede et dispositif de fabrication de couche de materiau semi-conducteur |
| WO2014020387A1 (en) | 2012-07-31 | 2014-02-06 | Soitec | Methods of forming semiconductor structures including mems devices and integrated circuits on opposing sides of substrates, and related structures and devices |
| US9741918B2 (en) | 2013-10-07 | 2017-08-22 | Hypres, Inc. | Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit |
| FR3064820B1 (fr) | 2017-03-31 | 2019-11-29 | Soitec | Procede d'ajustement de l'etat de contrainte d'un film piezoelectrique |
| FR3068508B1 (fr) * | 2017-06-30 | 2019-07-26 | Soitec | Procede de transfert d'une couche mince sur un substrat support presentant des coefficients de dilatation thermique differents |
| US10991617B2 (en) | 2018-05-15 | 2021-04-27 | Applied Materials, Inc. | Methods and apparatus for cleaving of semiconductor substrates |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2475068B1 (fr) | 1980-02-01 | 1986-05-16 | Commissariat Energie Atomique | Procede de dopage de semi-conducteurs |
| FR2506344B2 (fr) | 1980-02-01 | 1986-07-11 | Commissariat Energie Atomique | Procede de dopage de semi-conducteurs |
| JPH02186614A (ja) * | 1989-01-12 | 1990-07-20 | Seiko Epson Corp | 強誘電体膜の処理方法 |
| FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| US5216572A (en) * | 1992-03-19 | 1993-06-01 | Ramtron International Corporation | Structure and method for increasing the dielectric constant of integrated ferroelectric capacitors |
| FR2714524B1 (fr) | 1993-12-23 | 1996-01-26 | Commissariat Energie Atomique | Procede de realisation d'une structure en relief sur un support en materiau semiconducteur |
| FR2715501B1 (fr) | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Procédé de dépôt de lames semiconductrices sur un support. |
| FR2738671B1 (fr) | 1995-09-13 | 1997-10-10 | Commissariat Energie Atomique | Procede de fabrication de films minces a materiau semiconducteur |
| FR2748850B1 (fr) * | 1996-05-15 | 1998-07-24 | Commissariat Energie Atomique | Procede de realisation d'un film mince de materiau solide et applications de ce procede |
| US6048411A (en) * | 1997-05-12 | 2000-04-11 | Silicon Genesis Corporation | Silicon-on-silicon hybrid wafer assembly |
-
1996
- 1996-05-15 FR FR9606085A patent/FR2748850B1/fr not_active Expired - Fee Related
-
1997
- 1997-05-13 EP EP97924080A patent/EP0902843B1/fr not_active Expired - Lifetime
- 1997-05-13 DE DE69701571T patent/DE69701571T2/de not_active Expired - Lifetime
- 1997-05-13 JP JP54059597A patent/JP4659929B2/ja not_active Expired - Lifetime
- 1997-05-13 KR KR1019980709202A patent/KR20000011051A/ko not_active Withdrawn
- 1997-05-13 US US09/147,266 patent/US6190998B1/en not_active Expired - Lifetime
- 1997-05-13 WO PCT/FR1997/000842 patent/WO1997043461A1/fr not_active Ceased
-
2008
- 2008-08-21 JP JP2008213117A patent/JP2009010409A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP0902843B1 (fr) | 2000-03-29 |
| JP2009010409A (ja) | 2009-01-15 |
| FR2748850A1 (fr) | 1997-11-21 |
| FR2748850B1 (fr) | 1998-07-24 |
| DE69701571D1 (de) | 2000-05-04 |
| KR20000011051A (ko) | 2000-02-25 |
| US6190998B1 (en) | 2001-02-20 |
| WO1997043461A1 (fr) | 1997-11-20 |
| EP0902843A1 (fr) | 1999-03-24 |
| JP2000510284A (ja) | 2000-08-08 |
| JP4659929B2 (ja) | 2011-03-30 |
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