DE69635018D1 - Schutz gegen elektrostatische entladung für ein makrozellenfeld - Google Patents
Schutz gegen elektrostatische entladung für ein makrozellenfeldInfo
- Publication number
- DE69635018D1 DE69635018D1 DE69635018T DE69635018T DE69635018D1 DE 69635018 D1 DE69635018 D1 DE 69635018D1 DE 69635018 T DE69635018 T DE 69635018T DE 69635018 T DE69635018 T DE 69635018T DE 69635018 D1 DE69635018 D1 DE 69635018D1
- Authority
- DE
- Germany
- Prior art keywords
- macroclean
- field
- protection against
- electrostatic discharge
- against electrostatic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
- H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/439,929 US5548135A (en) | 1995-05-12 | 1995-05-12 | Electrostatic discharge protection for an array of macro cells |
US439929 | 1995-05-12 | ||
PCT/IB1996/000587 WO1996036988A2 (en) | 1995-05-12 | 1996-05-13 | Electrostatic discharge protection for an array of macro cells |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69635018D1 true DE69635018D1 (de) | 2005-09-08 |
DE69635018T2 DE69635018T2 (de) | 2006-06-01 |
Family
ID=23746722
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69635018T Expired - Fee Related DE69635018T2 (de) | 1995-05-12 | 1996-05-13 | Schutz gegen elektrostatische entladung für ein makrozellenfeld |
Country Status (6)
Country | Link |
---|---|
US (1) | US5548135A (de) |
EP (1) | EP0826243B1 (de) |
JP (1) | JP3183892B2 (de) |
KR (1) | KR100301549B1 (de) |
DE (1) | DE69635018T2 (de) |
WO (1) | WO1996036988A2 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0702402B1 (de) * | 1994-09-13 | 2003-01-15 | STMicroelectronics S.r.l. | Verfahren zur Herstellung integrierter Schaltungen und erzeugte Halbleiterscheibe |
US5808947A (en) * | 1995-08-21 | 1998-09-15 | Sgs-Thomson Microelectronics, Inc. | Integrated circuit that supports and method for wafer-level testing |
US5861660A (en) * | 1995-08-21 | 1999-01-19 | Stmicroelectronics, Inc. | Integrated-circuit die suitable for wafer-level testing and method for forming the same |
US6477687B1 (en) * | 1998-06-01 | 2002-11-05 | Nvidia U.S. Investment Company | Method of embedding RAMS and other macrocells in the core of an integrated circuit chip |
US6242814B1 (en) * | 1998-07-31 | 2001-06-05 | Lsi Logic Corporation | Universal I/O pad structure for in-line or staggered wire bonding or arrayed flip-chip assembly |
TW473983B (en) * | 1999-07-28 | 2002-01-21 | Rohm Co Ltd | Semiconductor integrated circuit device |
US6947273B2 (en) * | 2001-01-29 | 2005-09-20 | Primarion, Inc. | Power, ground, and routing scheme for a microprocessor power regulator |
EP1321984A3 (de) * | 2001-08-24 | 2004-01-14 | STMicroelectronics Limited | Eingangs/Ausgangs-Schaltungsanordnung für einen integrierten Halbleiterbaustein |
FR2831328A1 (fr) | 2001-10-23 | 2003-04-25 | St Microelectronics Sa | Protection d'un circuit integre contre des decharges electrostatiques et autres surtensions |
US7480010B2 (en) * | 2002-09-04 | 2009-01-20 | Denace Enterprise Co., L.L.C. | Customizable ASIC with substantially non-customizable portion that supplies pixel data to a mask-programmable portion in multiple color space formats |
US7782398B2 (en) * | 2002-09-04 | 2010-08-24 | Chan Thomas M | Display processor integrated circuit with on-chip programmable logic for implementing custom enhancement functions |
US7202908B2 (en) * | 2002-09-04 | 2007-04-10 | Darien K. Wallace | Deinterlacer using both low angle and high angle spatial interpolation |
JP4264640B2 (ja) * | 2003-08-19 | 2009-05-20 | ソニー株式会社 | 半導体装置の製造方法 |
US7291930B2 (en) * | 2005-02-23 | 2007-11-06 | Faraday Technology Corp. | Input and output circuit of an integrated circuit chip |
JP2008130994A (ja) * | 2006-11-24 | 2008-06-05 | Toshiba Corp | 静電保護回路 |
JP2008147376A (ja) * | 2006-12-08 | 2008-06-26 | Toshiba Corp | 半導体装置 |
US8247845B2 (en) * | 2008-01-28 | 2012-08-21 | Infineon Technologies Ag | Electrostatic discharge (ESD) protection circuit placement in semiconductor devices |
US7838959B2 (en) * | 2008-01-29 | 2010-11-23 | Infineon Technologies Ag | Radio frequency (RF) circuit placement in semiconductor devices |
EP2789012B1 (de) * | 2011-12-08 | 2020-02-05 | Sofics BVBA | Elektrostatische entladungsklemme mit hoher haltespannung und mischspannungsbereich |
US8680573B2 (en) | 2012-04-25 | 2014-03-25 | International Business Machines Corporation | Diode-triggered silicon controlled rectifier with an integrated diode |
US8946766B2 (en) | 2013-02-27 | 2015-02-03 | International Business Machines Corporation | Bi-directional silicon controlled rectifier structure |
FR3054722B1 (fr) * | 2016-07-26 | 2018-08-17 | Stmicroelectronics (Rousset) Sas | Structure de protection d'un circuit integre contre les decharges electrostatiques |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3904931A (en) * | 1973-08-03 | 1975-09-09 | Rca Corp | Overvoltage protection circuit |
JPS6070742A (ja) * | 1983-09-27 | 1985-04-22 | Toshiba Corp | マスタ・スライス型半導体装置 |
JPS61218143A (ja) * | 1985-03-25 | 1986-09-27 | Hitachi Ltd | 半導体集積回路装置 |
GB8621839D0 (en) * | 1986-09-10 | 1986-10-15 | British Aerospace | Electrostatic discharge protection circuit |
US5043782A (en) * | 1990-05-08 | 1991-08-27 | David Sarnoff Research Center, Inc. | Low voltage triggered snap-back device |
US5237395A (en) * | 1991-05-28 | 1993-08-17 | Western Digital Corporation | Power rail ESD protection circuit |
US5535084A (en) * | 1992-07-24 | 1996-07-09 | Kawasaki Steel Corporation | Semiconductor integrated circuit having protection circuits |
JP3351440B2 (ja) * | 1992-07-24 | 2002-11-25 | 川崎マイクロエレクトロニクス株式会社 | 半導体集積回路 |
US5336908A (en) * | 1992-08-26 | 1994-08-09 | Micron Semiconductor, Inc. | Input EDS protection circuit |
JP2884938B2 (ja) * | 1992-09-07 | 1999-04-19 | 日本電気株式会社 | 半導体装置 |
US5361185A (en) * | 1993-02-19 | 1994-11-01 | Advanced Micro Devices, Inc. | Distributed VCC/VSS ESD clamp structure |
US5311391A (en) * | 1993-05-04 | 1994-05-10 | Hewlett-Packard Company | Electrostatic discharge protection circuit with dynamic triggering |
US5343053A (en) * | 1993-05-21 | 1994-08-30 | David Sarnoff Research Center Inc. | SCR electrostatic discharge protection for integrated circuits |
-
1995
- 1995-05-12 US US08/439,929 patent/US5548135A/en not_active Expired - Lifetime
-
1996
- 1996-05-13 KR KR1019970708186A patent/KR100301549B1/ko not_active IP Right Cessation
- 1996-05-13 WO PCT/IB1996/000587 patent/WO1996036988A2/en active IP Right Grant
- 1996-05-13 JP JP53468096A patent/JP3183892B2/ja not_active Expired - Fee Related
- 1996-05-13 DE DE69635018T patent/DE69635018T2/de not_active Expired - Fee Related
- 1996-05-13 EP EP96916261A patent/EP0826243B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69635018T2 (de) | 2006-06-01 |
WO1996036988A2 (en) | 1996-11-21 |
KR100301549B1 (ko) | 2001-09-22 |
US5548135A (en) | 1996-08-20 |
EP0826243B1 (de) | 2005-08-03 |
KR19990014842A (ko) | 1999-02-25 |
JP3183892B2 (ja) | 2001-07-09 |
JPH11505374A (ja) | 1999-05-18 |
EP0826243A2 (de) | 1998-03-04 |
WO1996036988A3 (en) | 1997-01-16 |
EP0826243A4 (de) | 2000-07-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |