DE69624865D1 - Winner-Take-All Schaltkreis - Google Patents

Winner-Take-All Schaltkreis

Info

Publication number
DE69624865D1
DE69624865D1 DE69624865T DE69624865T DE69624865D1 DE 69624865 D1 DE69624865 D1 DE 69624865D1 DE 69624865 T DE69624865 T DE 69624865T DE 69624865 T DE69624865 T DE 69624865T DE 69624865 D1 DE69624865 D1 DE 69624865D1
Authority
DE
Germany
Prior art keywords
winner
take
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69624865T
Other languages
English (en)
Other versions
DE69624865T2 (de
Inventor
Masayuki Miyamoto
Kunihiko Iizuka
Mitsuhiko Fujio
Hirofumi Matsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE69624865D1 publication Critical patent/DE69624865D1/de
Application granted granted Critical
Publication of DE69624865T2 publication Critical patent/DE69624865T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0038—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing pulses or pulse trains according to amplitude)

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Analogue/Digital Conversion (AREA)
DE69624865T 1995-05-24 1996-05-24 Winner-Take-All Schaltkreis Expired - Lifetime DE69624865T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12537295A JP3176821B2 (ja) 1995-05-24 1995-05-24 入力判定回路

Publications (2)

Publication Number Publication Date
DE69624865D1 true DE69624865D1 (de) 2003-01-02
DE69624865T2 DE69624865T2 (de) 2003-07-03

Family

ID=14908509

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69624865T Expired - Lifetime DE69624865T2 (de) 1995-05-24 1996-05-24 Winner-Take-All Schaltkreis

Country Status (4)

Country Link
US (1) US5703503A (de)
EP (1) EP0744624B1 (de)
JP (1) JP3176821B2 (de)
DE (1) DE69624865T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3639883B2 (ja) * 1995-10-03 2005-04-20 国立大学法人東北大学 瞬時認識機能を有する演算回路及び瞬時認識方式
JPH09229970A (ja) * 1996-02-28 1997-09-05 Sharp Corp 入力検出回路
JP3388088B2 (ja) * 1996-04-22 2003-03-17 シャープ株式会社 多入力多出力競合型増幅回路
JPH1125200A (ja) * 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路
JP3411505B2 (ja) 1997-09-30 2003-06-03 シャープ株式会社 スペクトル拡散通信装置
US6271693B1 (en) * 1997-12-12 2001-08-07 United Microelectronics Corp. Multi-function switched-current magnitude sorter
JP3589557B2 (ja) * 1997-12-24 2004-11-17 シャープ株式会社 センスアンプ回路
US6198311B1 (en) * 1998-08-24 2001-03-06 Winbond Electronics Corp. Expandable analog current sorter based on magnitude
US6118307A (en) * 1999-03-02 2000-09-12 Winbond Electronics Corp. Switched capacitor sorter based on magnitude
US7054850B2 (en) 2000-06-16 2006-05-30 Canon Kabushiki Kaisha Apparatus and method for detecting or recognizing pattern by employing a plurality of feature detecting elements
KR100387983B1 (ko) * 2000-12-27 2003-06-18 한국과학기술원 레이스 로직 회로
US6362662B1 (en) * 2001-05-04 2002-03-26 Winbond Electronics Corp. Analog W.T.A. circuit reject signal
US7769798B2 (en) * 2004-04-27 2010-08-03 Amir Banihashemi Full CMOS min-sum analog iterative decoders
US8253383B2 (en) * 2009-02-05 2012-08-28 O2Micro Inc Circuits and methods for monitoring multi-cell battery packs
CN102575991B (zh) * 2009-10-23 2016-06-15 皇家飞利浦电子股份有限公司 检测荧光信号的检测器和监测多个分立荧光信号的设备
CN103516340B (zh) * 2012-06-29 2017-01-25 快捷半导体(苏州)有限公司 一种最大电压选择电路、方法及子选择电路
DE102017200143A1 (de) 2017-01-09 2018-07-12 Robert Bosch Gmbh Magnetometer
CN111930011A (zh) * 2020-07-01 2020-11-13 江西理工大学 一种基于离散时间反馈模型winner-take-all的智能优化算法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5059814A (en) * 1988-11-30 1991-10-22 The California Institute Of Technology Winner-take-all circuits for neural computing systems
US5049758A (en) * 1988-12-09 1991-09-17 Synaptics, Incorporated Adaptable CMOS winner-take all circuit
US5408194A (en) * 1993-06-25 1995-04-18 Synaptics, Incorporated Adaptive analog minimum/maximum selector and subtractor circuit
WO1996010753A1 (en) * 1994-09-30 1996-04-11 Philips Electronics N.V. Extreme level circuit

Also Published As

Publication number Publication date
EP0744624B1 (de) 2002-11-20
US5703503A (en) 1997-12-30
EP0744624A2 (de) 1996-11-27
EP0744624A3 (de) 1998-01-07
JP3176821B2 (ja) 2001-06-18
JPH08321747A (ja) 1996-12-03
DE69624865T2 (de) 2003-07-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition