DE69616130T2 - Schaltungsplatte mit niedrigem Ausdehnungskoeffizient zur Prüfung von integrierten Schaltungen - Google Patents

Schaltungsplatte mit niedrigem Ausdehnungskoeffizient zur Prüfung von integrierten Schaltungen

Info

Publication number
DE69616130T2
DE69616130T2 DE69616130T DE69616130T DE69616130T2 DE 69616130 T2 DE69616130 T2 DE 69616130T2 DE 69616130 T DE69616130 T DE 69616130T DE 69616130 T DE69616130 T DE 69616130T DE 69616130 T2 DE69616130 T2 DE 69616130T2
Authority
DE
Germany
Prior art keywords
circuit board
integrated circuits
expansion coefficient
low expansion
testing integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69616130T
Other languages
German (de)
English (en)
Other versions
DE69616130D1 (de
Inventor
Barbara Vasquez
John W Stafford
William M Williams
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE69616130D1 publication Critical patent/DE69616130D1/de
Publication of DE69616130T2 publication Critical patent/DE69616130T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07314—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3737—Organic materials with or without a thermoconductive filler
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/015—Fluoropolymer, e.g. polytetrafluoroethylene [PTFE]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Environmental & Geological Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
DE69616130T 1995-03-16 1996-02-29 Schaltungsplatte mit niedrigem Ausdehnungskoeffizient zur Prüfung von integrierten Schaltungen Expired - Fee Related DE69616130T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/405,317 US5602491A (en) 1995-03-16 1995-03-16 Integrated circuit testing board having constrained thermal expansion characteristics

Publications (2)

Publication Number Publication Date
DE69616130D1 DE69616130D1 (de) 2001-11-29
DE69616130T2 true DE69616130T2 (de) 2002-04-25

Family

ID=23603180

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69616130T Expired - Fee Related DE69616130T2 (de) 1995-03-16 1996-02-29 Schaltungsplatte mit niedrigem Ausdehnungskoeffizient zur Prüfung von integrierten Schaltungen

Country Status (4)

Country Link
US (1) US5602491A (ja)
EP (1) EP0737027B1 (ja)
JP (1) JP3337901B2 (ja)
DE (1) DE69616130T2 (ja)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6097089A (en) 1998-01-28 2000-08-01 Mitsubishi Gas Chemical Company, Inc. Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
US5896038A (en) * 1996-11-08 1999-04-20 W. L. Gore & Associates, Inc. Method of wafer level burn-in
US5830565A (en) * 1996-11-08 1998-11-03 W. L. Gore & Associates, Inc. High planarity and low thermal coefficient of expansion base for semi-conductor reliability screening
US5966022A (en) * 1996-11-08 1999-10-12 W. L. Gore & Associates, Inc. Wafer level burn-in system
US5766979A (en) * 1996-11-08 1998-06-16 W. L. Gore & Associates, Inc. Wafer level contact sheet and method of assembly
US5909123A (en) * 1996-11-08 1999-06-01 W. L. Gore & Associates, Inc. Method for performing reliability screening and burn-in of semi-conductor wafers
US5966593A (en) * 1996-11-08 1999-10-12 W. L. Gore & Associates, Inc. Method of forming a wafer level contact sheet having a permanent z-axis material
US5886535A (en) * 1996-11-08 1999-03-23 W. L. Gore & Associates, Inc. Wafer level burn-in base unit substrate and assembly
JP3193659B2 (ja) * 1997-02-25 2001-07-30 インターナショナル・ビジネス・マシーンズ・コーポレ−ション プロービング方法
US6147506A (en) * 1997-04-29 2000-11-14 International Business Machines Corporation Wafer test fixture using a biasing bladder and methodology
US6034533A (en) 1997-06-10 2000-03-07 Tervo; Paul A. Low-current pogo probe card
US5953210A (en) * 1997-07-08 1999-09-14 Hughes Electronics Corporation Reworkable circuit board assembly including a reworkable flip chip
US6329603B1 (en) * 1999-04-07 2001-12-11 International Business Machines Corporation Low CTE power and ground planes
JP2002093869A (ja) * 2000-09-20 2002-03-29 Mitsubishi Electric Corp バーンイン方法及びバーンイン装置
TWI234218B (en) * 2002-03-29 2005-06-11 Toshiba Corp Semiconductor test device, contact substrate for testing semiconductor device, testing method of semiconductor device, semiconductor device and the manufacturing method thereof
JP4979214B2 (ja) * 2005-08-31 2012-07-18 日本発條株式会社 プローブカード

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3954509A (en) * 1974-05-02 1976-05-04 The International Nickel Company, Inc. Method of producing low expansion alloys
DE3018117A1 (de) * 1979-05-14 1980-11-27 Tokyo Shibaura Electric Co Legierung mit niedrigem ausdehnungskoeffizienten und ein bimetall, das daraus hergestellt wird
US4496793A (en) * 1980-06-25 1985-01-29 General Electric Company Multi-layer metal core circuit board laminate with a controlled thermal coefficient of expansion
US4866507A (en) * 1986-05-19 1989-09-12 International Business Machines Corporation Module for packaging semiconductor integrated circuit chips on a base substrate
US4943468A (en) * 1988-10-31 1990-07-24 Texas Instruments Incorporated Ceramic based substrate for electronic circuit system modules
DE68927931T2 (de) * 1989-07-26 1997-09-18 Ibm Verfahren zur Herstellung einer Packungsstruktur für einen integrierten Schaltungschip
US5195021A (en) * 1989-08-21 1993-03-16 Texas Instruments Incorporated Constraining core for surface mount technology
FR2664721B1 (fr) * 1990-07-10 1992-09-25 Gemplus Card Int Carte a puce renforcee.
US5298685A (en) * 1990-10-30 1994-03-29 International Business Machines Corporation Interconnection method and structure for organic circuit boards

Also Published As

Publication number Publication date
EP0737027B1 (en) 2001-10-24
JPH08264615A (ja) 1996-10-11
JP3337901B2 (ja) 2002-10-28
EP0737027A3 (en) 1996-10-16
EP0737027A2 (en) 1996-10-09
US5602491A (en) 1997-02-11
DE69616130D1 (de) 2001-11-29

Similar Documents

Publication Publication Date Title
DE69734379D1 (de) Vorrichtung zur Prüfung von integrierten Schaltungen
DE69431844D1 (de) Testgerät für gedruckte schaltungen
DE69634952D1 (de) Verfahren zur verhinderung des eindringens in elektronische schaltungen
DE69522418T2 (de) Querstrom-Minimierung in elektronischen Schaltungen
DE69616130T2 (de) Schaltungsplatte mit niedrigem Ausdehnungskoeffizient zur Prüfung von integrierten Schaltungen
DE69127060D1 (de) Tester für integrierte Schaltungen
DE69728004D1 (de) Temperaturregelung für elektronische Schaltkreise
DE69311432D1 (de) Schnittstelle zur Kopplung von elektronischen Schaltungen
DE69616081D1 (de) Verbindungsschema für integrierte schaltungen
DE69226987T2 (de) Lokalverbindungen für integrierte Schaltungen
KR960015836A (ko) 집적회로 시험장치
DE69016962D1 (de) Dynamische Isolierschaltung für integrierte Schaltungen.
DE69620510D1 (de) Integrierte schaltungen mit randlosen kontaktlöchern
DE69717216D1 (de) Schaltplatinenprüfvorrichtung und Verfahren dafür
DE69633695D1 (de) Konfigurierbare Kontaktleiste zur bequemen parallellen Prüfung von integrierten Schaltungen
DE69121187D1 (de) Gerät zur versuchsverbindung von elektronischen schaltungen
SG74105A1 (en) Semiconductor device method of manufacturing the same circuit board and electronic instrument
DE69214581D1 (de) Leiterplatte für gedruckte Schaltungen
DE69720725D1 (de) Verbesserte Ausgangsschaltung für integrierte Schaltungen
DE59208836D1 (de) Schaltungsanordnung zum Testen integrierter Schaltungen
DE69430036D1 (de) Testvorrichtung für integrierte Schaltungen
KR970004980A (ko) 회로기판 및 그 제조방법
DE69724708D1 (de) Verbesserungen betreffend integrierte Schaltungen
FR2786292B1 (fr) Systeme de test et de personnalisation de circuits integres
KR970002349A (ko) 인쇄회로기판의 칩부품 장착 상태 검사 장치

Legal Events

Date Code Title Description
8328 Change in the person/name/address of the agent

Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US

8339 Ceased/non-payment of the annual fee