DE69518611T2 - Speichervorrichtung mit umschaltung von datenstrombetriebsarten - Google Patents

Speichervorrichtung mit umschaltung von datenstrombetriebsarten

Info

Publication number
DE69518611T2
DE69518611T2 DE69518611T DE69518611T DE69518611T2 DE 69518611 T2 DE69518611 T2 DE 69518611T2 DE 69518611 T DE69518611 T DE 69518611T DE 69518611 T DE69518611 T DE 69518611T DE 69518611 T2 DE69518611 T2 DE 69518611T2
Authority
DE
Germany
Prior art keywords
switching
storage device
operating modes
current operating
data current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69518611T
Other languages
English (en)
Other versions
DE69518611D1 (de
Inventor
E Alexander
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Inc
Original Assignee
Microchip Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microchip Technology Inc filed Critical Microchip Technology Inc
Publication of DE69518611D1 publication Critical patent/DE69518611D1/de
Application granted granted Critical
Publication of DE69518611T2 publication Critical patent/DE69518611T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
DE69518611T 1994-06-27 1995-06-22 Speichervorrichtung mit umschaltung von datenstrombetriebsarten Expired - Lifetime DE69518611T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/266,948 US5513334A (en) 1994-06-27 1994-06-27 Memory device with switching of data stream modes
PCT/US1995/007982 WO1996000420A1 (en) 1994-06-27 1995-06-22 Memory device with switching of data stream modes

Publications (2)

Publication Number Publication Date
DE69518611D1 DE69518611D1 (de) 2000-10-05
DE69518611T2 true DE69518611T2 (de) 2001-05-03

Family

ID=23016641

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69518611T Expired - Lifetime DE69518611T2 (de) 1994-06-27 1995-06-22 Speichervorrichtung mit umschaltung von datenstrombetriebsarten

Country Status (8)

Country Link
US (1) US5513334A (de)
EP (1) EP0715736B1 (de)
JP (1) JP2834330B2 (de)
KR (1) KR0178106B1 (de)
DE (1) DE69518611T2 (de)
DK (1) DK0715736T3 (de)
TW (1) TW327212B (de)
WO (1) WO1996000420A1 (de)

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US6121949A (en) * 1994-03-17 2000-09-19 Cirrus Logic, Inc. Method and apparatus for automatically maintaining a predetermined image quality in a display system
US5606715A (en) * 1995-06-26 1997-02-25 Motorola Inc. Flexible reset configuration of a data processing system and method therefor
US5623687A (en) * 1995-06-26 1997-04-22 Motorola Reset configuration in a data processing system and method therefor
US5841996A (en) * 1995-10-13 1998-11-24 Microchip Technology Incorporated Serial communication interface system having programmable microcontroller for use in a battery pack
JPH10133995A (ja) * 1996-05-13 1998-05-22 Sun Microsyst Inc コンピュータ・システムと周辺装置間の最適能力を選択する方法および装置
US5878234A (en) * 1996-09-10 1999-03-02 Sierra Wireless, Inc. Low power serial protocol translator for use in multi-circuit board electronic systems
US6693678B1 (en) 1997-12-18 2004-02-17 Thomson Licensing S.A. Data bus driver having first and second operating modes for coupling data to the bus at first and second rates
JP4017822B2 (ja) * 1997-12-18 2007-12-05 トムソン ライセンシング データの伝送を制御する装置
US6363437B1 (en) * 1999-01-07 2002-03-26 Telefonaktiebolaget Lm Ericsson (Publ) Plug and play I2C slave
FR2799045B1 (fr) * 1999-09-29 2002-02-08 St Microelectronics Sa Memoire en circuit integre a acces serie
EP1513059A1 (de) * 2003-09-08 2005-03-09 Barco N.V. Pixeleinheit für Grossoberflächeanzeigevorrichtung
JP4791696B2 (ja) 2004-03-02 2011-10-12 オンセミコンダクター・トレーディング・リミテッド データ転送メモリ及びモジュール
KR100613606B1 (ko) * 2004-06-25 2006-08-21 삼성전자주식회사 전송받은 본체의 사양정보를 이용하여 자신의 구동조건을설정하는 화상형성기기의 옵션장치 및 그 제어방법
JP4593196B2 (ja) * 2004-07-29 2010-12-08 シチズンホールディングス株式会社 半導体装置
KR100871524B1 (ko) * 2004-08-30 2008-12-05 샤프 가부시키가이샤 표시 제어 디바이스, 표시 장치, 표시 디바이스의 제어방법, 표시 제어 프로그램, 및 그 프로그램을 기록한 기록매체
JPWO2006025326A1 (ja) * 2004-08-31 2008-05-08 シャープ株式会社 視野角制御デバイス、表示装置、視野角制御デバイスの制御方法、視野角制御プログラム、および該プログラムを記録した記録媒体
WO2006027995A1 (ja) * 2004-09-07 2006-03-16 Sharp Kabushiki Kaisha 表示装置、視野角制御装置、および電子機器
US7817106B2 (en) * 2004-09-15 2010-10-19 Sharp Kabushiki Kaisha Display device, viewing angle control device, and electronic apparatus
US8031273B2 (en) * 2004-09-17 2011-10-04 Sharp Kabushiki Kaisha Display device, viewing angle control device, and electronic device
WO2006038574A1 (ja) * 2004-10-04 2006-04-13 Sharp Kabushiki Kaisha 表示装置および電子機器
JP4543880B2 (ja) * 2004-10-27 2010-09-15 ソニー株式会社 メモリー装置
US9660808B2 (en) * 2005-08-01 2017-05-23 Schneider Electric It Corporation Communication protocol and method for authenticating a system
US7796589B2 (en) * 2005-08-01 2010-09-14 American Power Conversion Corporation Communication protocol
CN100517279C (zh) * 2005-12-01 2009-07-22 鸿富锦精密工业（深圳）有限公司 数据撷取装置和方法
WO2009044228A2 (en) * 2006-08-15 2009-04-09 Nxp B.V. Device with an eeprom having both a near field communication interface and a second interface
EP2102754B1 (de) * 2006-12-20 2013-03-20 Nxp B.V. Takterzeugung für speicherzugriff ohne einen lokaloszillator
US8549198B2 (en) * 2009-03-27 2013-10-01 Schneider Electric It Corporation Communication protocol
US8194480B2 (en) * 2009-11-19 2012-06-05 Himax Technologies Limited Method for initializing memory device
CN102087880B (zh) * 2009-12-08 2013-09-18 奇景光电股份有限公司 存储器元件的初始化方法
FR3006094A1 (fr) 2013-05-21 2014-11-28 St Microelectronics Rousset Ecriture d'une memoire eeprom sur bus i2c
FR3006097A1 (fr) 2013-05-21 2014-11-28 St Microelectronics Rousset Mecanisme d'ecriture d'une memoire eeprom sur bus i2c
US9582457B2 (en) * 2013-06-12 2017-02-28 Qualcomm Incorporated Camera control interface extension bus
WO2020232582A1 (zh) * 2019-05-17 2020-11-26 华为技术有限公司 一种具有接口复用功能的集成电路及管脚切换方法

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US4713756A (en) * 1985-02-28 1987-12-15 Westinghouse Electric Corp. Non-volatile memory device for a programmable controller
JPS63184184A (ja) * 1987-01-26 1988-07-29 Tokyo Keiki Co Ltd メモリパツケ−ジシステム
US4841485A (en) * 1987-11-05 1989-06-20 International Business Machines Corporation Read/write memory device with an embedded read-only pattern and method for providing same
JPH01123269U (de) * 1988-02-16 1989-08-22
US5053990A (en) * 1988-02-17 1991-10-01 Intel Corporation Program/erase selection for flash memory
US5070500A (en) * 1988-08-30 1991-12-03 Tokyo Keiki Company Ltd. Memory package system utilizing inductive coupling between memory module and read/write unit
US5159672A (en) * 1989-12-28 1992-10-27 Intel Corporation Burst EPROM architecture

Also Published As

Publication number Publication date
WO1996000420A1 (en) 1996-01-04
JP2834330B2 (ja) 1998-12-09
TW327212B (en) 1998-02-21
JPH09503610A (ja) 1997-04-08
DE69518611D1 (de) 2000-10-05
KR960704274A (ko) 1996-08-31
DK0715736T3 (da) 2001-01-02
EP0715736A4 (de) 1996-12-27
US5513334A (en) 1996-04-30
EP0715736B1 (de) 2000-08-30
KR0178106B1 (ko) 1999-05-15
EP0715736A1 (de) 1996-06-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: DF-MP, 80333 MUENCHEN