DE69512551D1 - Integrierter Speicher mit Spaltenspannungserhaltungsschaltung - Google Patents

Integrierter Speicher mit Spaltenspannungserhaltungsschaltung

Info

Publication number
DE69512551D1
DE69512551D1 DE69512551T DE69512551T DE69512551D1 DE 69512551 D1 DE69512551 D1 DE 69512551D1 DE 69512551 T DE69512551 T DE 69512551T DE 69512551 T DE69512551 T DE 69512551T DE 69512551 D1 DE69512551 D1 DE 69512551D1
Authority
DE
Germany
Prior art keywords
integrated memory
column voltage
voltage maintenance
maintenance circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69512551T
Other languages
English (en)
Other versions
DE69512551T2 (de
Inventor
Olivier Rouy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE69512551D1 publication Critical patent/DE69512551D1/de
Publication of DE69512551T2 publication Critical patent/DE69512551T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
DE69512551T 1994-03-31 1995-03-20 Integrierter Speicher mit Spaltenspannungserhaltungsschaltung Expired - Fee Related DE69512551T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9403844A FR2718273B1 (fr) 1994-03-31 1994-03-31 Mémoire intégrée avec circuit de maintien de la tension de colonne.

Publications (2)

Publication Number Publication Date
DE69512551D1 true DE69512551D1 (de) 1999-11-11
DE69512551T2 DE69512551T2 (de) 2000-05-11

Family

ID=9461645

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69512551T Expired - Fee Related DE69512551T2 (de) 1994-03-31 1995-03-20 Integrierter Speicher mit Spaltenspannungserhaltungsschaltung

Country Status (5)

Country Link
US (2) US5610860A (de)
EP (1) EP0675503B1 (de)
JP (1) JP2919299B2 (de)
DE (1) DE69512551T2 (de)
FR (1) FR2718273B1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998039693A1 (fr) * 1997-03-04 1998-09-11 Seiko Epson Corporation Circuit electronique, dispositif a semiconducteur, materiel electronique et horloge
US6686792B2 (en) 1997-03-04 2004-02-03 Seiko Epson Corporation Electronic circuit, semiconductor device, electronic equipment, and timepiece
EP1324345A1 (de) * 2001-12-27 2003-07-02 STMicroelectronics S.r.l. Nichtflüchtige Speicheranordnung mit einziger Speisespannung mit Kaskode-Spaltendekodiererung
EP1326258B1 (de) * 2001-12-27 2016-03-23 STMicroelectronics Srl Nichtflüchtiger Phasenänderungsspeicher mit nur einer Speisespannung, Kaskoden-Spaltenauswahl und gleichzeitigen Wortlese- und -schreiboperationen
US6801025B2 (en) * 2002-11-07 2004-10-05 International Business Machines Corporation Method and apparatus for control of voltage regulation
DE60323202D1 (de) * 2003-02-21 2008-10-09 St Microelectronics Srl Phasenwechselspeicheranordnung
US7321516B2 (en) * 2004-02-19 2008-01-22 Stmicroelectronics, S.R.L. Biasing structure for accessing semiconductor memory cell storage elements
US7099204B1 (en) * 2005-03-23 2006-08-29 Spansion Llc Current sensing circuit with a current-compensated drain voltage regulation
US7929345B2 (en) * 2008-12-23 2011-04-19 Actel Corporation Push-pull memory cell configured for simultaneous programming of n-channel and p-channel non-volatile transistors
US8120955B2 (en) * 2009-02-13 2012-02-21 Actel Corporation Array and control method for flash based FPGA cell
US8269204B2 (en) 2009-07-02 2012-09-18 Actel Corporation Back to back resistive random access memory cells
US10270451B2 (en) 2015-12-17 2019-04-23 Microsemi SoC Corporation Low leakage ReRAM FPGA configuration cell
US10147485B2 (en) 2016-09-29 2018-12-04 Microsemi Soc Corp. Circuits and methods for preventing over-programming of ReRAM-based memory cells
WO2018106450A1 (en) 2016-12-09 2018-06-14 Microsemi Soc Corp. Resistive random access memory cell
US10522224B2 (en) 2017-08-11 2019-12-31 Microsemi Soc Corp. Circuitry and methods for programming resistive random access memory devices

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4723225A (en) * 1985-10-15 1988-02-02 Texas Instruments Incorporated Programming current controller
US4858186A (en) * 1988-01-12 1989-08-15 Intle Corporation A circuit for providing a load for the charging of an EPROM cell
US5229963A (en) * 1988-09-21 1993-07-20 Kabushiki Kaisha Toshiba Semiconductor nonvolatile memory device for controlling the potentials on bit lines
KR940003406B1 (ko) * 1991-06-12 1994-04-21 삼성전자 주식회사 내부 전원전압 발생회로
JP3247402B2 (ja) * 1991-07-25 2002-01-15 株式会社東芝 半導体装置及び不揮発性半導体記憶装置
US5268871A (en) * 1991-10-03 1993-12-07 International Business Machines Corporation Power supply tracking regulator for a memory array
US5231315A (en) * 1991-10-29 1993-07-27 Lattice Semiconductor Corporation Temperature compensated CMOS voltage to current converter
JP3176985B2 (ja) * 1992-05-27 2001-06-18 株式会社東芝 半導体メモリ
DE4219464A1 (de) * 1992-06-13 1993-12-16 Philips Patentverwaltung Verfahren und Schaltungsanordnung zum Erzeugen einer Programmierspannung
SG47058A1 (en) * 1993-09-10 1998-03-20 Intel Corp Circuitry and method for selecting a drain programming voltage for a nonvolatile memory
DE69325714T2 (de) * 1993-12-31 2000-03-02 St Microelectronics Srl Spannungsregler für nichtflüchtige Halbleiterspeicheranordnungen

Also Published As

Publication number Publication date
EP0675503B1 (de) 1999-10-06
FR2718273A1 (fr) 1995-10-06
JP2919299B2 (ja) 1999-07-12
US5729162A (en) 1998-03-17
JPH07287986A (ja) 1995-10-31
US5610860A (en) 1997-03-11
EP0675503A1 (de) 1995-10-04
FR2718273B1 (fr) 1996-05-24
DE69512551T2 (de) 2000-05-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee