DE69326749D1 - Nichtflüchtiger Speicher mit Schutzdiode - Google Patents

Nichtflüchtiger Speicher mit Schutzdiode

Info

Publication number
DE69326749D1
DE69326749D1 DE69326749T DE69326749T DE69326749D1 DE 69326749 D1 DE69326749 D1 DE 69326749D1 DE 69326749 T DE69326749 T DE 69326749T DE 69326749 T DE69326749 T DE 69326749T DE 69326749 D1 DE69326749 D1 DE 69326749D1
Authority
DE
Germany
Prior art keywords
volatile memory
protective diode
diode
protective
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69326749T
Other languages
English (en)
Other versions
DE69326749T2 (de
Inventor
Paolo Giuseppe Cappelletti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69326749D1 publication Critical patent/DE69326749D1/de
Publication of DE69326749T2 publication Critical patent/DE69326749T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/005—Circuit means for protection against loss of information of semiconductor storage devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE69326749T 1993-02-17 1993-02-17 Nichtflüchtiger Speicher mit Schutzdiode Expired - Fee Related DE69326749T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP93830058A EP0614223B1 (de) 1993-02-17 1993-02-17 Nichtflüchtiger Speicher mit Schutzdiode

Publications (2)

Publication Number Publication Date
DE69326749D1 true DE69326749D1 (de) 1999-11-18
DE69326749T2 DE69326749T2 (de) 2000-05-11

Family

ID=8215119

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69326749T Expired - Fee Related DE69326749T2 (de) 1993-02-17 1993-02-17 Nichtflüchtiger Speicher mit Schutzdiode

Country Status (4)

Country Link
US (1) US5497345A (de)
EP (1) EP0614223B1 (de)
JP (1) JPH0745728A (de)
DE (1) DE69326749T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5457336A (en) * 1994-10-13 1995-10-10 Advanced Micro Devices, Inc. Non-volatile memory structure including protection and structure for maintaining threshold stability
KR0144909B1 (ko) * 1995-03-21 1998-07-01 김광호 비휘발성 메모리 장치의 셀 어레이 레이아웃 방법
JP3980178B2 (ja) * 1997-08-29 2007-09-26 株式会社半導体エネルギー研究所 不揮発性メモリおよび半導体装置
US6291285B1 (en) * 1998-12-16 2001-09-18 United Microelectronics Corp. Method for protecting gate oxide layer and monitoring damage
DE19914781A1 (de) * 1999-03-31 2000-10-12 Siemens Ag Elektronisches Gerät, insbesondere Feldgerät
FR2803100B1 (fr) * 1999-12-28 2002-12-06 St Microelectronics Sa Dispositif de protection de lignes d'interconnexions dans un circuit integre
US6487139B1 (en) * 2001-09-28 2002-11-26 Jagdish Pathak Memory row line driver circuit
TW527722B (en) * 2002-03-20 2003-04-11 Macronix Int Co Ltd Non-volatile memory device and fabrication method thereof
TW531872B (en) * 2002-04-12 2003-05-11 Macronix Int Co Ltd Non-volatile memory capable of preventing antenna effect and fabrication thereof
JP4163610B2 (ja) * 2003-12-22 2008-10-08 株式会社東芝 不揮発性半導体記憶装置
US8816438B2 (en) * 2012-12-14 2014-08-26 Spansion Llc Process charging protection for split gate charge trapping flash
CN112017720A (zh) * 2020-07-09 2020-12-01 广东美的白色家电技术创新中心有限公司 一种mos管、存储单元、存储器及电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6025837B2 (ja) * 1978-09-14 1985-06-20 株式会社東芝 半導体記憶装置
US4589097A (en) * 1982-03-16 1986-05-13 Citizen Watch Company Limited Non-volatile memory circuit having a common write and erase terminal
JPS59121971A (ja) * 1982-12-23 1984-07-14 モトロ−ラ・インコ−ポレ−テツド 基準化ｃｍｏｓデバイス用入力保護回路およびバイアス方法
JPH0716005B2 (ja) * 1988-04-08 1995-02-22 株式会社東芝 半導体装置
US5103425A (en) * 1991-03-11 1992-04-07 Motorola, Inc. Zener regulated programming circuit for a nonvolatile memory
US5295095A (en) * 1991-08-22 1994-03-15 Lattice Semiconductor Corporation Method of programming electrically erasable programmable read-only memory using particular substrate bias
JP3111576B2 (ja) * 1992-01-06 2000-11-27 富士電機株式会社 半導体装置

Also Published As

Publication number Publication date
US5497345A (en) 1996-03-05
JPH0745728A (ja) 1995-02-14
DE69326749T2 (de) 2000-05-11
EP0614223B1 (de) 1999-10-13
EP0614223A1 (de) 1994-09-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee