DE69323484T2 - Verfahren und Schaltung zur Tunneleffektprogrammierung eines MOSFETs mit schwebendem Gatter - Google Patents

Verfahren und Schaltung zur Tunneleffektprogrammierung eines MOSFETs mit schwebendem Gatter

Info

Publication number
DE69323484T2
DE69323484T2 DE69323484T DE69323484T DE69323484T2 DE 69323484 T2 DE69323484 T2 DE 69323484T2 DE 69323484 T DE69323484 T DE 69323484T DE 69323484 T DE69323484 T DE 69323484T DE 69323484 T2 DE69323484 T2 DE 69323484T2
Authority
DE
Germany
Prior art keywords
programming
circuit
floating gate
tunnel effect
gate mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69323484T
Other languages
English (en)
Other versions
DE69323484D1 (de
Inventor
Bruno Ricco
Massimo Lanzoni
Luciano Briozzo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69323484D1 publication Critical patent/DE69323484D1/de
Publication of DE69323484T2 publication Critical patent/DE69323484T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3477Circuits or methods to prevent overerasing of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3486Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
DE69323484T 1993-04-22 1993-04-22 Verfahren und Schaltung zur Tunneleffektprogrammierung eines MOSFETs mit schwebendem Gatter Expired - Fee Related DE69323484T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP93830172A EP0621603B1 (de) 1993-04-22 1993-04-22 Verfahren und Schaltung zur Tunneleffektprogrammierung eines MOSFETs mit schwebendem Gatter

Publications (2)

Publication Number Publication Date
DE69323484D1 DE69323484D1 (de) 1999-03-25
DE69323484T2 true DE69323484T2 (de) 1999-08-26

Family

ID=8215151

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69323484T Expired - Fee Related DE69323484T2 (de) 1993-04-22 1993-04-22 Verfahren und Schaltung zur Tunneleffektprogrammierung eines MOSFETs mit schwebendem Gatter

Country Status (4)

Country Link
US (1) US5493141A (de)
EP (1) EP0621603B1 (de)
JP (1) JPH07122081A (de)
DE (1) DE69323484T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3635681B2 (ja) 1994-07-15 2005-04-06 ソニー株式会社 バイアス回路の調整方法、電荷転送装置、及び電荷検出装置とその調整方法
DE19518728C2 (de) * 1995-05-22 1998-12-24 Siemens Ag Konstantstromquelle mit einer EEPROM-Zelle
US5930171A (en) * 1995-05-22 1999-07-27 Siemens Aktiengesellschaft Constant-current source with an EEPROM cell
FR2738386B1 (fr) * 1995-09-05 1997-10-24 Sgs Thomson Microelectronics Procede et circuit de programmation et d'effacement d'une memoire
KR980005016A (ko) * 1996-06-29 1998-03-30 김주용 플래쉬 메모리 소자의 소거방법
US5835413A (en) * 1996-12-20 1998-11-10 Intel Corporation Method for improved data retention in a nonvolatile writeable memory by sensing and reprogramming cell voltage levels
US6330347B1 (en) 1997-02-19 2001-12-11 Stmicroelectronics S.R.L. Method and device for identifying fingerprints using an analog flash memory
US6864131B2 (en) * 1999-06-02 2005-03-08 Arizona State University Complementary Schottky junction transistors and methods of forming the same
DE60006529T2 (de) * 1999-06-02 2004-09-23 Arizona State University, Tempe Stromgesteuerter feldeffekttransistor
US7589007B2 (en) * 1999-06-02 2009-09-15 Arizona Board Of Regents For And On Behalf Of Arizona State University MESFETs integrated with MOSFETs on common substrate and methods of forming the same
US6521958B1 (en) * 1999-08-26 2003-02-18 Micron Technology, Inc. MOSFET technology for programmable address decode and correction
WO2002056316A1 (fr) * 2001-01-12 2002-07-18 Hitachi, Ltd. Memoire remanente a semi-conducteur
US6674667B2 (en) * 2001-02-13 2004-01-06 Micron Technology, Inc. Programmable fuse and antifuse and method therefor
JP3683206B2 (ja) 2001-11-08 2005-08-17 沖電気工業株式会社 不揮発性半導体記憶装置およびその書き込み方法
TW519734B (en) * 2001-12-04 2003-02-01 Macronix Int Co Ltd Programming and erasing methods of non-volatile memory having nitride tunneling layer
US8878511B2 (en) * 2010-02-04 2014-11-04 Semiconductor Components Industries, Llc Current-mode programmable reference circuits and methods therefor
US8188785B2 (en) 2010-02-04 2012-05-29 Semiconductor Components Industries, Llc Mixed-mode circuits and methods of producing a reference current and a reference voltage
US8680840B2 (en) * 2010-02-11 2014-03-25 Semiconductor Components Industries, Llc Circuits and methods of producing a reference current or voltage

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3972059A (en) * 1973-12-28 1976-07-27 International Business Machines Corporation Dielectric diode, fabrication thereof, and charge store memory therewith
US4185319A (en) * 1978-10-04 1980-01-22 Rca Corp. Non-volatile memory device
JPS5619589A (en) * 1979-07-26 1981-02-24 Fujitsu Ltd Amplifier circuit of internal signal
US4616245A (en) * 1984-10-29 1986-10-07 Ncr Corporation Direct-write silicon nitride EEPROM cell
US4797856A (en) * 1987-04-16 1989-01-10 Intel Corporation Self-limiting erase scheme for EEPROM
US5253196A (en) * 1991-01-09 1993-10-12 The United States Of America As Represented By The Secretary Of The Navy MOS analog memory with injection capacitors
US5138576A (en) * 1991-11-06 1992-08-11 Altera Corporation Method and apparatus for erasing an array of electrically erasable EPROM cells
US5220533A (en) * 1991-11-06 1993-06-15 Altera Corporation Method and apparatus for preventing overerasure in a flash cell

Also Published As

Publication number Publication date
JPH07122081A (ja) 1995-05-12
EP0621603B1 (de) 1999-02-10
US5493141A (en) 1996-02-20
DE69323484D1 (de) 1999-03-25
EP0621603A1 (de) 1994-10-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee