DE69322554T2 - Unterbrechungsfreigabeschaltungen und -verfahren - Google Patents

Unterbrechungsfreigabeschaltungen und -verfahren

Info

Publication number
DE69322554T2
DE69322554T2 DE69322554T DE69322554T DE69322554T2 DE 69322554 T2 DE69322554 T2 DE 69322554T2 DE 69322554 T DE69322554 T DE 69322554T DE 69322554 T DE69322554 T DE 69322554T DE 69322554 T2 DE69322554 T2 DE 69322554T2
Authority
DE
Germany
Prior art keywords
procedures
interrupt enable
enable circuits
circuits
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69322554T
Other languages
English (en)
Other versions
DE69322554D1 (de
Inventor
James E Bowles
Mark Luedtka
Dale E Gulick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25438885&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69322554(T2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69322554D1 publication Critical patent/DE69322554D1/de
Publication of DE69322554T2 publication Critical patent/DE69322554T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
DE69322554T 1992-07-21 1993-07-13 Unterbrechungsfreigabeschaltungen und -verfahren Expired - Lifetime DE69322554T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US91750392A 1992-07-21 1992-07-21

Publications (2)

Publication Number Publication Date
DE69322554D1 DE69322554D1 (de) 1999-01-28
DE69322554T2 true DE69322554T2 (de) 1999-08-19

Family

ID=25438885

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69322554T Expired - Lifetime DE69322554T2 (de) 1992-07-21 1993-07-13 Unterbrechungsfreigabeschaltungen und -verfahren

Country Status (5)

Country Link
US (1) US5530597A (de)
EP (1) EP0581479B1 (de)
JP (1) JP3678759B2 (de)
CN (1) CN1040479C (de)
DE (1) DE69322554T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU6769994A (en) * 1993-05-07 1994-12-12 Apple Computer, Inc. Data streaming for non-dma digital computing devices
US6222846B1 (en) * 1998-04-22 2001-04-24 Compaq Computer Corporation Method and system for employing a non-masking interrupt as an input-output processor interrupt
FR2795537B1 (fr) * 1999-06-24 2001-09-21 Cit Alcatel Procede d'execution d'une tache en temps reel par un processeur de traitement numerique du signal
US6493781B1 (en) * 1999-08-19 2002-12-10 Koninklijke Philips Electronics N.V. Servicing of interrupts with stored and restored flags
US6647440B1 (en) 1999-09-15 2003-11-11 Koninklijke Philips Electronics N.V. End-of-message handling and interrupt generation in a CAN module providing hardware assembly of multi-frame CAN messages
US6633940B1 (en) * 1999-10-11 2003-10-14 Ati International Srl Method and apparatus for processing interrupts in a computing system
US6671795B1 (en) * 2000-01-21 2003-12-30 Intel Corporation Method and apparatus for pausing execution in a processor or the like
US20020178313A1 (en) * 2001-03-30 2002-11-28 Gary Scott Paul Using software interrupts to manage communication between data processors
US7363474B2 (en) * 2001-12-31 2008-04-22 Intel Corporation Method and apparatus for suspending execution of a thread until a specified memory access occurs
US20030126379A1 (en) * 2001-12-31 2003-07-03 Shiv Kaushik Instruction sequences for suspending execution of a thread until a specified memory access occurs
US7127561B2 (en) * 2001-12-31 2006-10-24 Intel Corporation Coherency techniques for suspending execution of a thread until a specified memory access occurs
US20030126416A1 (en) * 2001-12-31 2003-07-03 Marr Deborah T. Suspending execution of a thread in a multi-threaded processor
CN1324476C (zh) * 2003-11-20 2007-07-04 联想(北京)有限公司 一种屏蔽系统硬件及系统功能的方法
GB2409543B (en) * 2003-12-23 2006-11-01 Advanced Risc Mach Ltd Interrupt masking control
JP2005221566A (ja) * 2004-02-03 2005-08-18 Seiko Epson Corp 表示コントローラ、表示システム及び表示制御方法
US20070005828A1 (en) * 2005-06-30 2007-01-04 Nimrod Diamant Interrupts support for the KCS manageability interface
JP4897851B2 (ja) * 2009-05-14 2012-03-14 インターナショナル・ビジネス・マシーンズ・コーポレーション コンピュータ・システム及びコンピュータ・システムの制御方法
KR200460194Y1 (ko) * 2009-12-17 2012-05-09 박태인 화일
GB2487575B (en) * 2011-01-28 2017-04-12 Advanced Risc Mach Ltd Controlling generation of debug exceptions

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4004283A (en) * 1974-10-30 1977-01-18 Motorola, Inc. Multiple interrupt microprocessor system
US4010448A (en) * 1974-10-30 1977-03-01 Motorola, Inc. Interrupt circuitry for microprocessor chip
JPS6060024B2 (ja) * 1977-10-19 1985-12-27 株式会社日立製作所 エンジン制御方法
US4344133A (en) * 1978-07-31 1982-08-10 Motorola, Inc. Method for synchronizing hardware and software
US4420806A (en) * 1981-01-15 1983-12-13 Harris Corporation Interrupt coupling and monitoring system
US4616314A (en) * 1983-05-12 1986-10-07 Motorola, Inc. Microcomputer controlled data receiver
US4631674A (en) * 1985-02-05 1986-12-23 International Business Machines Corporation Active wait
JPH02190937A (ja) * 1989-01-19 1990-07-26 Sanyo Electric Co Ltd マイクロコンピュータの割り込み回路
US5121472A (en) * 1989-05-31 1992-06-09 Polytel Computer Products Corporation Method for replacing keyboard data using single step process mode
US5177747A (en) * 1989-10-16 1993-01-05 International Business Machines Corp. Personal computer memory bank parity error indicator
US5179368A (en) * 1989-11-09 1993-01-12 Lippincott Douglas E Method and apparatus for interfacing computer light pens
US5193187A (en) * 1989-12-29 1993-03-09 Supercomputer Systems Limited Partnership Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers
US5095526A (en) * 1990-01-26 1992-03-10 Apple Computer, Inc. Microprocessor with improved interrupt response with interrupt data saving dependent upon processor status
US5249284A (en) * 1990-06-04 1993-09-28 Ncr Corporation Method and system for maintaining data coherency between main and cache memories
JPH04135246A (ja) * 1990-08-20 1992-05-08 Mitsubishi Electric Corp データ処理装置

Also Published As

Publication number Publication date
CN1081776A (zh) 1994-02-09
US5530597A (en) 1996-06-25
CN1040479C (zh) 1998-10-28
JPH0675779A (ja) 1994-03-18
JP3678759B2 (ja) 2005-08-03
DE69322554D1 (de) 1999-01-28
EP0581479A1 (de) 1994-02-02
EP0581479B1 (de) 1998-12-16

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Legal Events

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