DE69423376T2 - Unterbrechungsverarbeitung - Google Patents

Unterbrechungsverarbeitung

Info

Publication number
DE69423376T2
DE69423376T2 DE69423376T DE69423376T DE69423376T2 DE 69423376 T2 DE69423376 T2 DE 69423376T2 DE 69423376 T DE69423376 T DE 69423376T DE 69423376 T DE69423376 T DE 69423376T DE 69423376 T2 DE69423376 T2 DE 69423376T2
Authority
DE
Germany
Prior art keywords
interrupt processing
interrupt
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69423376T
Other languages
English (en)
Other versions
DE69423376D1 (de
Inventor
Daniel P Mann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE69423376D1 publication Critical patent/DE69423376D1/de
Application granted granted Critical
Publication of DE69423376T2 publication Critical patent/DE69423376T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69423376T 1993-04-23 1994-03-29 Unterbrechungsverarbeitung Expired - Lifetime DE69423376T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5234793A 1993-04-23 1993-04-23

Publications (2)

Publication Number Publication Date
DE69423376D1 DE69423376D1 (de) 2000-04-20
DE69423376T2 true DE69423376T2 (de) 2000-10-12

Family

ID=21977024

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69423376T Expired - Lifetime DE69423376T2 (de) 1993-04-23 1994-03-29 Unterbrechungsverarbeitung

Country Status (4)

Country Link
US (1) US5717933A (de)
EP (1) EP0621535B1 (de)
JP (1) JPH06309178A (de)
DE (1) DE69423376T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5889973A (en) * 1995-03-31 1999-03-30 Motorola, Inc. Method and apparatus for selectively controlling interrupt latency in a data processing system
DE19535546B4 (de) * 1995-09-25 2004-04-08 Siemens Ag Verfahren zum Betreiben eines durch ein Realzeit-Betriebssystem gesteuerten Realzeit-Computersystems
US5987258A (en) * 1997-06-27 1999-11-16 Lsi Logic Corporation Register reservation method for fast context switching in microprocessors
JP3278603B2 (ja) * 1998-01-12 2002-04-30 エヌイーシーマイクロシステム株式会社 コンパイル装置、コンパイラの最適化方法及びコンパイラの最適化手順を記録した記録媒体
US6112292A (en) * 1998-04-21 2000-08-29 Idea Corporation Code sequence for asynchronous backing store switch utilizing both the cover and LOADRS instructions
US6115777A (en) * 1998-04-21 2000-09-05 Idea Corporation LOADRS instruction and asynchronous context switch
US6192513B1 (en) * 1998-11-02 2001-02-20 Hewlett-Packard Company Mechanism for finding spare registers in binary code
US6754755B1 (en) * 2000-08-10 2004-06-22 Hewlett-Packard Development Company, L.P. Service request system using an activity indicator to reduce processing overhead
EP1368732B1 (de) * 2000-10-18 2008-01-23 Koninklijke Philips Electronics N.V. Digitale signalprozessorvorrichtung
GB2390443B (en) * 2002-04-15 2005-03-16 Alphamosaic Ltd Application registers
US7739451B1 (en) * 2002-12-27 2010-06-15 Unisys Corporation Method and apparatus for stacked address, bus to memory data transfer
US20080052663A1 (en) * 2006-07-17 2008-02-28 Rod Cope Project extensibility and certification for stacking and support tool
US8595747B2 (en) * 2005-12-29 2013-11-26 Sony Computer Entertainment Inc. Efficient task scheduling by assigning fixed registers to scheduler
TWI386814B (zh) * 2007-12-31 2013-02-21 Ind Tech Res Inst 具動態工作管理能力之多處理器界面及其程式載卸方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62276634A (ja) * 1985-09-18 1987-12-01 Nec Corp 仮想計算機システム
US5050067A (en) * 1987-08-20 1991-09-17 Davin Computer Corporation Multiple sliding register stacks in a computer
US5241680A (en) * 1989-06-12 1993-08-31 Grid Systems Corporation Low-power, standby mode computer
DE69130673T2 (de) * 1990-06-04 1999-05-20 3Com Corp Verfahren zur software-optimierung für irgendeine einer vielfältigkeit von ändernden architekturen
US5161226A (en) * 1991-05-10 1992-11-03 Jmi Software Consultants Inc. Microprocessor inverse processor state usage
EP1526446A3 (de) * 1991-07-08 2007-04-04 Seiko Epson Corporation RISC-Prozessor mit erweiterbarer Architektur
US5327566A (en) * 1991-07-12 1994-07-05 Hewlett Packard Company Stage saving and restoring hardware mechanism
JP3176093B2 (ja) * 1991-09-05 2001-06-11 日本電気株式会社 マイクロプロセッサの割込み制御装置

Also Published As

Publication number Publication date
EP0621535B1 (de) 2000-03-15
EP0621535A2 (de) 1994-10-26
JPH06309178A (ja) 1994-11-04
EP0621535A3 (de) 1995-02-08
DE69423376D1 (de) 2000-04-20
US5717933A (en) 1998-02-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES INC. MAPLES CORPORATE SERVICES, KY