DE69316256T2 - Hochspannungstruktur mit oxydisolierter Source und RESURF-Drift-Zone in Massivsilizium - Google Patents
Hochspannungstruktur mit oxydisolierter Source und RESURF-Drift-Zone in MassivsiliziumInfo
- Publication number
- DE69316256T2 DE69316256T2 DE69316256T DE69316256T DE69316256T2 DE 69316256 T2 DE69316256 T2 DE 69316256T2 DE 69316256 T DE69316256 T DE 69316256T DE 69316256 T DE69316256 T DE 69316256T DE 69316256 T2 DE69316256 T2 DE 69316256T2
- Authority
- DE
- Germany
- Prior art keywords
- high voltage
- drift zone
- solid silicon
- voltage structure
- oxide insulated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910052710 silicon Inorganic materials 0.000 title 1
- 239000010703 silicon Substances 0.000 title 1
- 239000007787 solid Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
- H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78639—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a drain or source connected to a bulk conducting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US85787592A | 1992-03-26 | 1992-03-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69316256D1 DE69316256D1 (de) | 1998-02-19 |
DE69316256T2 true DE69316256T2 (de) | 1998-08-06 |
Family
ID=25326914
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69316256T Expired - Fee Related DE69316256T2 (de) | 1992-03-26 | 1993-02-18 | Hochspannungstruktur mit oxydisolierter Source und RESURF-Drift-Zone in Massivsilizium |
Country Status (5)
Country | Link |
---|---|
US (1) | US5338965A (de) |
EP (1) | EP0562271B1 (de) |
JP (1) | JP3393148B2 (de) |
KR (1) | KR100301918B1 (de) |
DE (1) | DE69316256T2 (de) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10131705A1 (de) * | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131707A1 (de) * | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131706A1 (de) * | 2001-06-29 | 2003-01-30 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0610599A1 (de) * | 1993-01-04 | 1994-08-17 | Texas Instruments Incorporated | Hochspannungstransistor mit Drift-Zone |
JPH07254706A (ja) * | 1993-11-29 | 1995-10-03 | Texas Instr Inc <Ti> | 高電圧デバイス構造およびその製造方法 |
US5510275A (en) * | 1993-11-29 | 1996-04-23 | Texas Instruments Incorporated | Method of making a semiconductor device with a composite drift region composed of a substrate and a second semiconductor material |
US5777363A (en) * | 1993-11-29 | 1998-07-07 | Texas Instruments Incorporated | Semiconductor device with composite drift region |
US5382818A (en) * | 1993-12-08 | 1995-01-17 | Philips Electronics North America Corporation | Lateral semiconductor-on-insulator (SOI) semiconductor device having a buried diode |
JP2790050B2 (ja) * | 1994-08-17 | 1998-08-27 | 日本電気株式会社 | 半導体装置の製造方法 |
US5734180A (en) * | 1995-06-02 | 1998-03-31 | Texas Instruments Incorporated | High-performance high-voltage device structures |
EP0747961A3 (de) * | 1995-06-07 | 1998-11-11 | STMicroelectronics, Inc. | Leistungsfrei-SRAM mit einem als Muster angeordneten, vergrabenen Isolationsoxid |
US5719423A (en) * | 1995-08-31 | 1998-02-17 | Texas Instruments Incorporated | Isolated power transistor |
US6831331B2 (en) | 1995-11-15 | 2004-12-14 | Denso Corporation | Power MOS transistor for absorbing surge current |
US6242787B1 (en) | 1995-11-15 | 2001-06-05 | Denso Corporation | Semiconductor device and manufacturing method thereof |
TW360982B (en) * | 1996-01-26 | 1999-06-11 | Matsushita Electric Works Ltd | Thin film transistor of silicon-on-insulator type |
US5854113A (en) * | 1996-11-01 | 1998-12-29 | Electronics And Telecommunications Research Institute | Method for fabricating power transistor using silicon-on-insulator (SOI) wafer |
TW351001B (en) * | 1997-05-03 | 1999-01-21 | United Microelectronics Corp | High-density transistor and the manufacturing method |
US6140163A (en) * | 1997-07-11 | 2000-10-31 | Advanced Micro Devices, Inc. | Method and apparatus for upper level substrate isolation integrated with bulk silicon |
US5877048A (en) * | 1998-03-23 | 1999-03-02 | Texas Instruments--Acer Incorporated | 3-D CMOS transistors with high ESD reliability |
US6498372B2 (en) | 2001-02-16 | 2002-12-24 | International Business Machines Corporation | Conductive coupling of electrical structures to a semiconductor device located under a buried oxide layer |
DE10131704A1 (de) | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Dotierung eines Halbleiterkörpers |
US6551937B2 (en) | 2001-08-23 | 2003-04-22 | Institute Of Microelectronics | Process for device using partial SOI |
US6569729B1 (en) * | 2002-07-19 | 2003-05-27 | Taiwan Semiconductor Manufacturing Company | Method of fabricating three dimensional CMOSFET devices for an embedded DRAM application |
DE10250832B4 (de) | 2002-10-31 | 2010-02-11 | Infineon Technologies Ag | MOS-Transistor auf SOI-Substrat mit Source-Durchkontaktierung und Verfahren zur Herstellung eines solchen Transistors |
DE10345347A1 (de) | 2003-09-19 | 2005-04-14 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors mit lateralem Driftregionen-Dotierstoffprofil |
DE102004005948B4 (de) * | 2004-02-02 | 2009-04-02 | Atmel Germany Gmbh | MOS-Transistor und Verfahren zur Herstellung einer MOS-Transistorstruktur |
JP5151087B2 (ja) * | 2005-11-01 | 2013-02-27 | 株式会社デンソー | 半導体装置およびその製造方法 |
KR100790247B1 (ko) * | 2006-12-27 | 2008-01-02 | 동부일렉트로닉스 주식회사 | Ldmos 트랜지스터 및 이의 제조 방법 |
US7829947B2 (en) * | 2009-03-17 | 2010-11-09 | Alpha & Omega Semiconductor Incorporated | Bottom-drain LDMOS power MOSFET structure having a top drain strap |
US20120105095A1 (en) * | 2010-11-03 | 2012-05-03 | International Business Machines Corporation | Silicon-on-insulator (soi) body-contact pass gate structure |
US9041105B2 (en) | 2012-07-20 | 2015-05-26 | International Business Machines Corporation | Integrated circuit including transistor structure on depleted silicon-on-insulator, related method and design structure |
US9660074B2 (en) | 2014-08-07 | 2017-05-23 | Texas Instruments Incorporated | Methods and apparatus for LDMOS devices with cascaded RESURF implants and double buffers |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56142673A (en) * | 1980-04-09 | 1981-11-07 | Nec Corp | Semiconductor device |
CA1228935A (en) * | 1983-12-23 | 1987-11-03 | Sony Corp | SEMICONDUCTOR DEVICE WITH ACTIVE ZONE OF POLYCRYSTALLINE SILICON, AND THEIR MANUFACTURE |
US4763183A (en) * | 1984-08-01 | 1988-08-09 | American Telephone And Telegraph Co., At&T Bell Laboratories | Semiconductor-on-insulator (SOI) devices and SOI IC fabrication method |
US4786952A (en) * | 1986-07-24 | 1988-11-22 | General Motors Corporation | High voltage depletion mode MOS power field effect transistor |
US5081473A (en) * | 1990-07-26 | 1992-01-14 | Xerox Corporation | Temperature control transducer and MOS driver for thermal ink jet printing chips |
US5113236A (en) * | 1990-12-14 | 1992-05-12 | North American Philips Corporation | Integrated circuit device particularly adapted for high voltage applications |
-
1993
- 1993-02-18 EP EP93102538A patent/EP0562271B1/de not_active Expired - Lifetime
- 1993-02-18 DE DE69316256T patent/DE69316256T2/de not_active Expired - Fee Related
- 1993-03-25 KR KR1019930004649A patent/KR100301918B1/ko not_active IP Right Cessation
- 1993-03-26 JP JP06813693A patent/JP3393148B2/ja not_active Expired - Fee Related
- 1993-04-26 US US08/053,028 patent/US5338965A/en not_active Expired - Lifetime
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10131705A1 (de) * | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131707A1 (de) * | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131706A1 (de) * | 2001-06-29 | 2003-01-30 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131706B4 (de) * | 2001-06-29 | 2005-10-06 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131707B4 (de) * | 2001-06-29 | 2009-12-03 | Atmel Automotive Gmbh | Verfahren zur Herstellung eines DMOS-Transistors und dessen Verwendung zur Herstellung einer integrierten Schaltung |
DE10131705B4 (de) * | 2001-06-29 | 2010-03-18 | Atmel Automotive Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
Also Published As
Publication number | Publication date |
---|---|
KR930020739A (ko) | 1993-10-20 |
JPH06260652A (ja) | 1994-09-16 |
KR100301918B1 (ko) | 2001-10-22 |
EP0562271A1 (de) | 1993-09-29 |
JP3393148B2 (ja) | 2003-04-07 |
US5338965A (en) | 1994-08-16 |
DE69316256D1 (de) | 1998-02-19 |
EP0562271B1 (de) | 1998-01-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |