DE69230551T2 - Verfahren und Gerät zur Erzeugung von Korrektionssignalen zur Bildung von analogen Signalen mit niedriger Verzerrung - Google Patents

Verfahren und Gerät zur Erzeugung von Korrektionssignalen zur Bildung von analogen Signalen mit niedriger Verzerrung

Info

Publication number
DE69230551T2
DE69230551T2 DE69230551T DE69230551T DE69230551T2 DE 69230551 T2 DE69230551 T2 DE 69230551T2 DE 69230551 T DE69230551 T DE 69230551T DE 69230551 T DE69230551 T DE 69230551T DE 69230551 T2 DE69230551 T2 DE 69230551T2
Authority
DE
Germany
Prior art keywords
signal
segment
digital
data signal
distortion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69230551T
Other languages
German (de)
English (en)
Other versions
DE69230551D1 (de
Inventor
Frank Mayo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ion Geophysical Corp
Original Assignee
Ion Geophysical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ion Geophysical Corp filed Critical Ion Geophysical Corp
Publication of DE69230551D1 publication Critical patent/DE69230551D1/de
Application granted granted Critical
Publication of DE69230551T2 publication Critical patent/DE69230551T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06JHYBRID COMPUTING ARRANGEMENTS
    • G06J1/00Hybrid computing arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/50Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502Details of the final digital/analogue conversion following the digital delta-sigma modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Automation & Control Theory (AREA)
  • Evolutionary Computation (AREA)
  • Fuzzy Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Analogue/Digital Conversion (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Amplifiers (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
DE69230551T 1991-10-25 1992-10-16 Verfahren und Gerät zur Erzeugung von Korrektionssignalen zur Bildung von analogen Signalen mit niedriger Verzerrung Expired - Fee Related DE69230551T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/782,111 US5182558A (en) 1991-10-25 1991-10-25 System for generating correction signals for use in forming low distortion analog signals

Publications (2)

Publication Number Publication Date
DE69230551D1 DE69230551D1 (de) 2000-02-17
DE69230551T2 true DE69230551T2 (de) 2000-08-03

Family

ID=25124989

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69230551T Expired - Fee Related DE69230551T2 (de) 1991-10-25 1992-10-16 Verfahren und Gerät zur Erzeugung von Korrektionssignalen zur Bildung von analogen Signalen mit niedriger Verzerrung

Country Status (8)

Country Link
US (1) US5182558A (US07345094-20080318-C00047.png)
EP (1) EP0539116B1 (US07345094-20080318-C00047.png)
AU (1) AU648701B2 (US07345094-20080318-C00047.png)
BR (1) BR9204131A (US07345094-20080318-C00047.png)
DE (1) DE69230551T2 (US07345094-20080318-C00047.png)
DK (1) DK0539116T3 (US07345094-20080318-C00047.png)
EC (1) ECSP920877A (US07345094-20080318-C00047.png)
NO (1) NO924110L (US07345094-20080318-C00047.png)

Families Citing this family (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0727878B1 (en) * 1995-01-23 2002-06-12 THOMSON multimedia Circuit for A/D conversion of a video RF or IF signal
JPH09264759A (ja) * 1996-03-29 1997-10-07 Mitsubishi Electric Corp エンコーダの信号補正方法および装置
US5859605A (en) * 1997-01-24 1999-01-12 Hughes Electronics Corporation Digital waveform generator and method for synthesizing periodic analog waveforms using table readout of simulated Δ- Σ analog-to-digital conversion data
JP2001013222A (ja) * 1999-06-29 2001-01-19 Ando Electric Co Ltd 波形生成回路
US7356186B2 (en) * 2002-08-23 2008-04-08 Kulas Charles J Digital representation of audio waveforms using peak shifting to provide increased dynamic range
US6885323B2 (en) 2003-06-27 2005-04-26 Optichron, Inc. Analog to digital converter with distortion correction
CN100539425C (zh) * 2003-06-27 2009-09-09 奥普蒂科伦公司 模拟-数字转换器
JP2007531415A (ja) * 2004-03-25 2007-11-01 オプティクロン・インコーポレーテッド アナログデジタルコンバータ線形化用の複雑度を低減した非線形フィルタ
US7199736B2 (en) * 2004-03-25 2007-04-03 Optichron, Inc. Digital linearizing system
WO2006020503A2 (en) * 2004-08-11 2006-02-23 Apogee Technology, Inc. Digital adaptive feedforward harmonic distortion compensation for digitally controlled power stage
TWI279712B (en) * 2005-04-13 2007-04-21 Realtek Semiconductor Corp Voice message encoding/decoding apparatus and its method
WO2007132456A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Memory device with adaptive capacity
CN103208309B (zh) 2006-05-12 2016-03-09 苹果公司 存储设备中的失真估计和消除
WO2007132457A2 (en) * 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
WO2008053472A2 (en) 2006-10-30 2008-05-08 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US8151163B2 (en) * 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US8151166B2 (en) * 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
WO2008111058A2 (en) 2007-03-12 2008-09-18 Anobit Technologies Ltd. Adaptive estimation of memory cell read thresholds
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
WO2008139441A2 (en) * 2007-05-12 2008-11-20 Anobit Technologies Ltd. Memory device with internal signal processing unit
US8259497B2 (en) * 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
WO2009050703A2 (en) 2007-10-19 2009-04-23 Anobit Technologies Data storage in analog memory cell arrays having erase failures
WO2009063450A2 (en) 2007-11-13 2009-05-22 Anobit Technologies Optimized selection of memory units in multi-unit memory devices
US8225181B2 (en) * 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) * 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US8493783B2 (en) 2008-03-18 2013-07-23 Apple Inc. Memory device readout using multiple sense times
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8261159B1 (en) 2008-10-30 2012-09-04 Apple, Inc. Data scrambling schemes for memory devices
US8208304B2 (en) * 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8174857B1 (en) 2008-12-31 2012-05-08 Anobit Technologies Ltd. Efficient readout schemes for analog memory cell devices using multiple read threshold sets
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) * 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8645794B1 (en) 2010-07-31 2014-02-04 Apple Inc. Data storage in analog memory cells using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8493781B1 (en) 2010-08-12 2013-07-23 Apple Inc. Interference mitigation using individual word line erasure operations
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3307173A (en) * 1964-04-16 1967-02-28 Alfred E Popodi Transient reduction in digital-to analog converters
JPS5953727B2 (ja) * 1977-04-06 1984-12-26 株式会社日立製作所 補正回路付da変換器
JPS55100744A (en) * 1979-01-29 1980-07-31 Hitachi Ltd Da converter with correction circuit
US4412208A (en) * 1980-09-16 1983-10-25 Nippon Telegraph & Telephone Public Corporation Digital to analog converter
US4465995A (en) * 1980-11-07 1984-08-14 Fairchild Camera And Instrument Corp. Method and apparatus for analyzing an analog-to-digital converter with a nonideal digital-to-analog converter
US4399426A (en) * 1981-05-04 1983-08-16 Tan Khen Sang On board self-calibration of analog-to-digital and digital-to-analog converters
US4509037A (en) * 1981-06-12 1985-04-02 Gould Inc. Enhanced delta modulation encoder
JPS5810919A (ja) * 1981-07-13 1983-01-21 Nippon Telegr & Teleph Corp <Ntt> アナログ・デイジタル変換器
JPS58181323A (ja) * 1982-04-16 1983-10-24 Nippon Telegr & Teleph Corp <Ntt> 較正機能付きデジタルアナログ変換器
US4542354A (en) * 1983-08-01 1985-09-17 Robinton Products, Inc. Delta-sigma pulse modulator with offset compensation
JPS60193082A (ja) * 1984-03-14 1985-10-01 Toshiba Corp アナログ信号処理装置
US4903023A (en) * 1985-11-06 1990-02-20 Westinghouse Electric Corp. Subranging analog-to-digital converter with digital error correction
JPS6386980A (ja) * 1986-09-30 1988-04-18 Toshiba Corp 周期ノイズ除去装置
US4851841A (en) * 1987-10-02 1989-07-25 Crystal Semiconductor Corporation Gain scaling of oversampled analog-to-digital converters
JPH01204528A (ja) * 1988-02-10 1989-08-17 Fujitsu Ltd A/d変換器
US4843390A (en) * 1988-02-24 1989-06-27 Motorola, Inc. Oversampled A/D converter having digital error correction
US4862169A (en) * 1988-03-25 1989-08-29 Motorola, Inc. Oversampled A/D converter using filtered, cascaded noise shaping modulators
US4943807A (en) * 1988-04-13 1990-07-24 Crystal Semiconductor Digitally calibrated delta-sigma analog-to-digital converter
US4896155A (en) * 1988-06-22 1990-01-23 Rockwell International Corporation Method and apparatus for self-calibration of subranging A/D converter
US4894656A (en) * 1988-11-25 1990-01-16 General Electric Company Self-calibrating pipelined subranging analog-to-digital converter
US4951052A (en) * 1989-07-10 1990-08-21 General Electric Company Correction of systematic error in an oversampled analog-to-digital converter
US4975699A (en) * 1989-12-01 1990-12-04 Hughes Aircraft Company Error reduction method and apparatus for a direct digital synthesizer
US4999625A (en) * 1990-03-02 1991-03-12 Motorola, Inc. Generation of a digital correction signal to compensate for gain mismatches in a sigma delta modulator
US4985702A (en) * 1990-04-02 1991-01-15 Triquint Semiconductor, Inc. Analog to digital converter with second order error correction
US5047772A (en) * 1990-06-04 1991-09-10 General Electric Company Digital error correction system for subranging analog-to-digital converters

Also Published As

Publication number Publication date
EP0539116B1 (en) 2000-01-12
DE69230551D1 (de) 2000-02-17
BR9204131A (pt) 1993-05-18
AU2725192A (en) 1993-04-29
DK0539116T3 (da) 2000-06-19
EP0539116A3 (US07345094-20080318-C00047.png) 1995-04-05
EP0539116A2 (en) 1993-04-28
ECSP920877A (es) 1993-12-15
NO924110L (no) 1993-04-26
AU648701B2 (en) 1994-04-28
US5182558A (en) 1993-01-26
NO924110D0 (no) 1992-10-23

Similar Documents

Publication Publication Date Title
DE69230551T2 (de) Verfahren und Gerät zur Erzeugung von Korrektionssignalen zur Bildung von analogen Signalen mit niedriger Verzerrung
DE69228987T2 (de) Analog-und digitalwandler
DE60125851T2 (de) Verwendung eines trägerwellenabhängigen Zittersignals für die Analog-Digital-Wandlung
EP0052847B1 (de) Verfahren und Schaltungsanordnung zur Umsetzung der Abtastfrequenz einer Abtastfolge unter Umgehung der Konversion in ein kontinuierliches Signal
DE102006030889B4 (de) Konzept zur Erzeugung von Radar-Signalen
DE60007087T2 (de) Verfahren und gerät zur korrektur von delta-sigma-wandlern hoher ordnung
DE69129821T2 (de) Mehrstufiger Sigma-deltaanalog/digitalumsetzer
EP0401562B1 (de) Anordnung zur Umsetzung eines Signals mit einer ersten Abtastrate in ein Signal mit einer zweiten Abtastrate
DE69123366T2 (de) Digitale Rauschformerschaltung
DE60010238T2 (de) Stabilisierungsschaltung mit frequenzgeformtem Pseudozufalls-Chopper und Verfahren für einen Delta-Sigma-Modulator
DE69417978T2 (de) Analog Digitalwandler mit Zittersignal
DE69616416T2 (de) Verfahren zur Simulation einer Schaltung
DE69116324T2 (de) A/D(Analog/Digital)-Wandler
DE69801753T2 (de) Analog-digital-wandlung mit hilfe von frequenzmodulierten eingangs- oder zwischenwerten
DE69213358T2 (de) Sigma-delta Analog-Digitalwandler mit verbesserter Stabilität.
DE4127096A1 (de) Gleichspannungs-kalibriereinrichtung fuer einen digital/analog-wandler
DE102014103350A1 (de) System und Verfahren für einen überabgetasteten Datenwandler
EP0559944A1 (de) Sigma-Delta-Modulator
EP1001538A2 (de) Sigma-Delta-Modulator und Verfahren zur Unterdrückung eines Quantisierungsfehlers in einem Sigma-Delta-Modulator
US9130586B1 (en) System and method of digital-to-analog signal conversion
DE102006023697A1 (de) Verfahren zum Decodieren, Decodierer, Codierer-Decodierer-System und Wandler
EP0666650A2 (de) Verfahren zur schnellen Decodierung der Ausgangssignale von Sigma Delta Modulatoren
DE102008052838B4 (de) Abtastfehlerverringerung bei PWM-MASH-Wandlern
DE69930255T2 (de) Digital-zu-analog konvertierer
DE602004011581T2 (de) Verfahren und Vorrichtung zum Entfernen von Tönen mittels Schaltverzögerung, die durch DEM (vergleich dynamische Elemente) verursacht werden bei Schaltverzögerung des Signals.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee