DE69227852D1 - Eigengetterung für ein epitaxiales Halbleiterplättchen - Google Patents

Eigengetterung für ein epitaxiales Halbleiterplättchen

Info

Publication number
DE69227852D1
DE69227852D1 DE69227852T DE69227852T DE69227852D1 DE 69227852 D1 DE69227852 D1 DE 69227852D1 DE 69227852 T DE69227852 T DE 69227852T DE 69227852 T DE69227852 T DE 69227852T DE 69227852 D1 DE69227852 D1 DE 69227852D1
Authority
DE
Germany
Prior art keywords
gettering
self
semiconductor chip
epitaxial semiconductor
epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69227852T
Other languages
English (en)
Other versions
DE69227852T2 (de
Inventor
Masahiro Toeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69227852D1 publication Critical patent/DE69227852D1/de
Publication of DE69227852T2 publication Critical patent/DE69227852T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE1992627852 1991-01-22 1992-01-22 Eigengetterung für ein epitaxiales Halbleiterplättchen Expired - Fee Related DE69227852T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3005494A JP2725460B2 (ja) 1991-01-22 1991-01-22 エピタキシャルウェハーの製造方法

Publications (2)

Publication Number Publication Date
DE69227852D1 true DE69227852D1 (de) 1999-01-28
DE69227852T2 DE69227852T2 (de) 1999-07-29

Family

ID=11612790

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1992627852 Expired - Fee Related DE69227852T2 (de) 1991-01-22 1992-01-22 Eigengetterung für ein epitaxiales Halbleiterplättchen

Country Status (3)

Country Link
EP (1) EP0496382B1 (de)
JP (1) JP2725460B2 (de)
DE (1) DE69227852T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3232168B2 (ja) * 1993-07-02 2001-11-26 三菱電機株式会社 半導体基板およびその製造方法ならびにその半導体基板を用いた半導体装置
US20020157597A1 (en) * 2000-01-26 2002-10-31 Hiroshi Takeno Method for producing silicon epitaxial wafer
JP4122696B2 (ja) * 2000-08-31 2008-07-23 株式会社Ｓｕｍｃｏ エピタキシャルウェーハを製造する方法
KR100699814B1 (ko) * 2000-10-31 2007-03-27 삼성전자주식회사 제어된 결함분포를 갖는 반도체 에피택셜 웨이퍼 및 그의제조방법
JPWO2014041736A1 (ja) * 2012-09-13 2016-08-12 パナソニックＩｐマネジメント株式会社 窒化物半導体構造物

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2080780B (en) * 1980-07-18 1983-06-29 Secr Defence Heat treatment of silicon slices
JPS5954220A (ja) * 1982-09-21 1984-03-29 Nec Corp 半導体装置の製造方法
JPS60198832A (ja) * 1984-03-23 1985-10-08 Nec Corp 半導体装置
JPS63104322A (ja) * 1986-10-21 1988-05-09 Toshiba Corp エピタキシヤルウエ−ハ
JPS63198334A (ja) * 1987-02-13 1988-08-17 Komatsu Denshi Kinzoku Kk 半導体シリコンウエ−ハの製造方法

Also Published As

Publication number Publication date
DE69227852T2 (de) 1999-07-29
EP0496382A3 (en) 1993-08-04
JPH04237134A (ja) 1992-08-25
JP2725460B2 (ja) 1998-03-11
EP0496382B1 (de) 1998-12-16
EP0496382A2 (de) 1992-07-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee