DE69223213D1 - MOS-Ausgangsschaltung mit niedrigem Spannungshub zum Ansteuern einer ECL-Schaltung - Google Patents

MOS-Ausgangsschaltung mit niedrigem Spannungshub zum Ansteuern einer ECL-Schaltung

Info

Publication number
DE69223213D1
DE69223213D1 DE69223213T DE69223213T DE69223213D1 DE 69223213 D1 DE69223213 D1 DE 69223213D1 DE 69223213 T DE69223213 T DE 69223213T DE 69223213 T DE69223213 T DE 69223213T DE 69223213 D1 DE69223213 D1 DE 69223213D1
Authority
DE
Germany
Prior art keywords
circuit
driving
low voltage
voltage swing
mos output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69223213T
Other languages
English (en)
Other versions
DE69223213T2 (de
Inventor
Robert J Proebsting
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intergraph Corp
Original Assignee
Intergraph Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intergraph Corp filed Critical Intergraph Corp
Application granted granted Critical
Publication of DE69223213D1 publication Critical patent/DE69223213D1/de
Publication of DE69223213T2 publication Critical patent/DE69223213T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE69223213T 1991-09-12 1992-09-04 MOS-Ausgangsschaltung mit niedrigem Spannungshub zum Ansteuern einer ECL-Schaltung Expired - Fee Related DE69223213T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/758,838 US5216297A (en) 1991-09-12 1991-09-12 Low voltage swing output mos circuit for driving an ecl circuit

Publications (2)

Publication Number Publication Date
DE69223213D1 true DE69223213D1 (de) 1998-01-02
DE69223213T2 DE69223213T2 (de) 1998-05-28

Family

ID=25053308

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69223213T Expired - Fee Related DE69223213T2 (de) 1991-09-12 1992-09-04 MOS-Ausgangsschaltung mit niedrigem Spannungshub zum Ansteuern einer ECL-Schaltung

Country Status (5)

Country Link
US (1) US5216297A (de)
EP (1) EP0536536B1 (de)
JP (1) JP3436548B2 (de)
CA (1) CA2077602C (de)
DE (1) DE69223213T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5418478A (en) * 1993-07-30 1995-05-23 Apple Computer, Inc. CMOS differential twisted-pair driver
SE515490C2 (sv) * 1993-12-03 2001-08-13 Ericsson Telefon Ab L M Signaleringssystem
CA2124745C (en) * 1994-05-31 2001-11-20 Brian D. Gerson High-speed cmos pseudo-ecl output driver
JPH09509030A (ja) * 1994-12-08 1997-09-09 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ 終端接続伝送ラインインピーダンス−整合回路
JPH08172350A (ja) * 1994-12-19 1996-07-02 Korea Electron Telecommun 低電力バッファー回路
US5495184A (en) * 1995-01-12 1996-02-27 Vlsi Technology, Inc. High-speed low-power CMOS PECL I/O transmitter
US5734617A (en) * 1996-08-01 1998-03-31 Micron Technology Corporation Shared pull-up and selection circuitry for programmable cells such as antifuse cells
US6104209A (en) * 1998-08-27 2000-08-15 Micron Technology, Inc. Low skew differential receiver with disable feature
US5977796A (en) * 1997-06-26 1999-11-02 Lucent Technologies, Inc. Low voltage differential swing interconnect buffer circuit
US5959492A (en) * 1997-10-31 1999-09-28 Vlsi Technology, Inc. High speed differential driver circuitry and methods for implementing the same
US6212482B1 (en) 1998-03-06 2001-04-03 Micron Technology, Inc. Circuit and method for specifying performance parameters in integrated circuits
JP3255154B2 (ja) * 1999-05-20 2002-02-12 日本電気株式会社 レベル変換方法及びレベル変換回路
US6353334B1 (en) * 2000-01-27 2002-03-05 Xilinx, Inc. Circuit for converting a logic signal on an output node to a pair of low-voltage differential signals
US6696852B1 (en) * 2000-07-25 2004-02-24 Artisan Components, Inc. Low-voltage differential I/O device
US6731135B2 (en) 2001-06-14 2004-05-04 Artisan Components, Inc. Low voltage differential signaling circuit with mid-point bias
US6424217B1 (en) 2001-09-05 2002-07-23 Pericom Semiconductor Corp. CMOS low-voltage PECL driver with initial current boost
US6542031B2 (en) 2001-09-05 2003-04-01 Pericom Semiconductor Corp. Switched IOH and IOL current sources for CMOS low-voltage PECL driver with self-timed pull-down current boost
DE10155526C2 (de) * 2001-11-12 2003-09-04 Infineon Technologies Ag LVDS-Treiber für kleine Versorungsspannungen
EP1376867A1 (de) * 2002-06-19 2004-01-02 Alcatel Differenzverstärker zur schneller CMOS-ECL-Konversion
JP4509737B2 (ja) * 2004-10-28 2010-07-21 株式会社東芝 差動信号生成回路および差動信号送信回路
US7215173B2 (en) * 2005-01-31 2007-05-08 Intel Corporation Low-swing level shifter
US7411421B1 (en) * 2005-12-07 2008-08-12 Altera Corporation Apparatus and method for generating differential signal using single-ended drivers
JP2007258891A (ja) * 2006-03-22 2007-10-04 Nec Electronics Corp 相補信号生成回路
JP2008048254A (ja) 2006-08-18 2008-02-28 Nec Electronics Corp レベル変換回路及び半導体装置
KR101621844B1 (ko) * 2014-05-08 2016-05-17 (주) 픽셀플러스 저전압 차동 신호 전송기

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4437171A (en) * 1982-01-07 1984-03-13 Intel Corporation ECL Compatible CMOS memory
US4645951A (en) * 1983-08-31 1987-02-24 Hitachi, Ltd. Semiconductor integrated circuit having a C-MOS internal logic block and an output buffer for providing ECL level signals
US4703199A (en) * 1985-04-03 1987-10-27 Intersil, Inc. Non-restricted level shifter
US4656372A (en) * 1985-11-25 1987-04-07 Ncr Corporation CMOS to ECL interface circuit
US4656375A (en) * 1985-12-16 1987-04-07 Ncr Corporation Temperature compensated CMOS to ECL translator
JPS62159916A (ja) * 1986-01-09 1987-07-15 Toshiba Corp レベル変換回路
US4704549A (en) * 1986-10-24 1987-11-03 Ncr Corporation CMOS to ECL converter-buffer
US4805196A (en) * 1987-04-29 1989-02-14 Gte Laboratories Incorporated Line delay compensation for digital transmission systems utilizing low power line drivers

Also Published As

Publication number Publication date
EP0536536A1 (de) 1993-04-14
CA2077602A1 (en) 1993-03-13
EP0536536B1 (de) 1997-11-19
JP3436548B2 (ja) 2003-08-11
DE69223213T2 (de) 1998-05-28
CA2077602C (en) 1998-05-05
JPH06244711A (ja) 1994-09-02
US5216297A (en) 1993-06-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: INTERGRAPH HARDWARE TECHNOLOGIES CO., LAS VEGAS, N

8339 Ceased/non-payment of the annual fee