DE69130004T2 - Analoger Vervielfacher - Google Patents

Analoger Vervielfacher

Info

Publication number
DE69130004T2
DE69130004T2 DE69130004T DE69130004T DE69130004T2 DE 69130004 T2 DE69130004 T2 DE 69130004T2 DE 69130004 T DE69130004 T DE 69130004T DE 69130004 T DE69130004 T DE 69130004T DE 69130004 T2 DE69130004 T2 DE 69130004T2
Authority
DE
Germany
Prior art keywords
analog multiplier
multiplier
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69130004T
Other languages
English (en)
Other versions
DE438372T1 (de
DE69130004D1 (de
Inventor
Katsuji Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69130004D1 publication Critical patent/DE69130004D1/de
Publication of DE69130004T2 publication Critical patent/DE69130004T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
    • G06G7/164—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division using means for evaluating powers, e.g. quarter square multiplier
DE69130004T 1990-05-31 1991-05-31 Analoger Vervielfacher Expired - Fee Related DE69130004T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2141923A JP2556173B2 (ja) 1990-05-31 1990-05-31 マルチプライヤ

Publications (2)

Publication Number Publication Date
DE69130004D1 DE69130004D1 (de) 1998-09-24
DE69130004T2 true DE69130004T2 (de) 1999-04-22

Family

ID=15303303

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69130004T Expired - Fee Related DE69130004T2 (de) 1990-05-31 1991-05-31 Analoger Vervielfacher

Country Status (4)

Country Link
US (1) US5107150A (de)
EP (1) EP0459513B1 (de)
JP (1) JP2556173B2 (de)
DE (1) DE69130004T2 (de)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2062875C (en) * 1991-03-13 1997-05-13 Katsuji Kimura Multiplier and squaring circuit to be used for the same
JP2661394B2 (ja) * 1991-04-08 1997-10-08 日本電気株式会社 掛算回路
US5306968A (en) * 1991-10-04 1994-04-26 Nec Corporation Rectifier circuit not using clock signal
WO1993015560A1 (en) * 1992-02-03 1993-08-05 Motorola, Inc. Balanced mixer circuit
JPH07109608B2 (ja) * 1992-10-30 1995-11-22 日本電気株式会社 マルチプライヤ
EP0600141B1 (de) * 1992-10-30 1997-03-05 SGS-THOMSON MICROELECTRONICS S.p.A. Transkonduktanzstufe
US5389840A (en) * 1992-11-10 1995-02-14 Elantec, Inc. Complementary analog multiplier circuits with differential ground referenced outputs and switching capability
JPH06162229A (ja) * 1992-11-18 1994-06-10 Nec Corp マルチプライヤ
JP3037004B2 (ja) * 1992-12-08 2000-04-24 日本電気株式会社 マルチプライヤ
CA2111945C (en) * 1992-12-21 1997-12-09 Katsuji Kimura Analog multiplier using an octotail cell or a quadritail cell
JPH06208635A (ja) * 1993-01-11 1994-07-26 Nec Corp マルチプライヤ
JP2576774B2 (ja) * 1993-10-29 1997-01-29 日本電気株式会社 トリプラおよびクァドルプラ
CA2144240C (en) * 1994-03-09 1999-03-23 Katsuji Kimura Analog multiplier using multitail cell
US5712810A (en) * 1994-06-13 1998-01-27 Nec Corporation Analog multiplier and multiplier core circuit used therefor
KR0155210B1 (ko) * 1994-06-13 1998-11-16 가네꼬 히사시 Mos 4상한 멀티플라이어
WO1995035548A1 (en) * 1994-06-20 1995-12-28 Unisearch Limited Analog multiplier
JP2638492B2 (ja) * 1994-07-12 1997-08-06 日本電気株式会社 Ｍｏｓ ｏｔａ
JP2555990B2 (ja) * 1994-08-03 1996-11-20 日本電気株式会社 マルチプライヤ
GB2295704B (en) * 1994-11-30 1998-12-16 Nec Corp Multiplier core circuit using quadritail cell
US5587687A (en) * 1995-02-02 1996-12-24 Silicon Systems, Inc. Multiplier based transconductance amplifiers and transconductance control circuits
US5587682A (en) * 1995-03-30 1996-12-24 Sgs-Thomson Microelectronics S.R.L. Four-quadrant biCMOS analog multiplier
JP2669397B2 (ja) * 1995-05-22 1997-10-27 日本電気株式会社 バイポーラ・マルチプライヤ
JP2874616B2 (ja) * 1995-10-13 1999-03-24 日本電気株式会社 Ｏｔａ及びマルチプライヤ
JPH09238032A (ja) * 1996-02-29 1997-09-09 Nec Corp Ｏｔａおよびバイポーラマルチプライヤ
GB2312064A (en) * 1996-04-12 1997-10-15 Nec Corp Analog multiplier
JP2910695B2 (ja) * 1996-08-30 1999-06-23 日本電気株式会社 コスタスループ搬送波再生回路
US5770965A (en) * 1996-09-30 1998-06-23 Motorola, Inc. Circuit and method of compensating for non-linearities in a sensor signal
US6204719B1 (en) * 1999-02-04 2001-03-20 Analog Devices, Inc. RMS-to-DC converter with balanced multi-tanh triplet squaring cells
US6437630B1 (en) 1999-12-28 2002-08-20 Analog Devices, Inc. RMS-DC converter having gain stages with variable weighting coefficients
TWI235550B (en) * 2002-06-26 2005-07-01 Frontend Analog And Digital Te Switching type Nth-power raising circuit for application in integrated circuit
US6791371B1 (en) 2003-03-27 2004-09-14 Pericom Semiconductor Corp. Power-down activated by differential-input multiplier and comparator
US6940352B2 (en) * 2003-11-26 2005-09-06 Scintera Networks, Inc. Analog signal interpolation
JP4918012B2 (ja) * 2007-10-24 2012-04-18 ルネサスエレクトロニクス株式会社 乗算回路
US10832014B1 (en) 2018-04-17 2020-11-10 Ali Tasdighi Far Multi-quadrant analog current-mode multipliers for artificial intelligence
US10594334B1 (en) 2018-04-17 2020-03-17 Ali Tasdighi Far Mixed-mode multipliers for artificial intelligence
US10700695B1 (en) 2018-04-17 2020-06-30 Ali Tasdighi Far Mixed-mode quarter square multipliers for machine learning
US11275909B1 (en) 2019-06-04 2022-03-15 Ali Tasdighi Far Current-mode analog multiply-accumulate circuits for artificial intelligence
US11416218B1 (en) 2020-07-10 2022-08-16 Ali Tasdighi Far Digital approximate squarer for machine learning
US11467805B1 (en) 2020-07-10 2022-10-11 Ali Tasdighi Far Digital approximate multipliers for machine learning and artificial intelligence applications

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3543288A (en) * 1968-05-27 1970-11-24 Zeltex Inc Apparatus and method for producing a square-law function
US3562553A (en) * 1968-10-21 1971-02-09 Allen R Roth Multiplier circuit
US4019118A (en) * 1976-03-29 1977-04-19 Rca Corporation Third harmonic signal generator

Also Published As

Publication number Publication date
EP0459513A3 (en) 1992-04-01
JP2556173B2 (ja) 1996-11-20
DE69130004D1 (de) 1998-09-24
US5107150A (en) 1992-04-21
EP0459513B1 (de) 1998-08-19
JPH0434673A (ja) 1992-02-05
EP0459513A2 (de) 1991-12-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee