DE69116919D1 - Selbsttestverfahren für inhaltsadressierbare Speicher - Google Patents

Selbsttestverfahren für inhaltsadressierbare Speicher

Info

Publication number
DE69116919D1
DE69116919D1 DE69116919T DE69116919T DE69116919D1 DE 69116919 D1 DE69116919 D1 DE 69116919D1 DE 69116919 T DE69116919 T DE 69116919T DE 69116919 T DE69116919 T DE 69116919T DE 69116919 D1 DE69116919 D1 DE 69116919D1
Authority
DE
Germany
Prior art keywords
self
test procedure
content addressable
addressable memories
memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69116919T
Other languages
English (en)
Other versions
DE69116919T2 (de
Inventor
Yervant Zorian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Publication of DE69116919D1 publication Critical patent/DE69116919D1/de
Application granted granted Critical
Publication of DE69116919T2 publication Critical patent/DE69116919T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
DE69116919T 1990-04-02 1991-03-26 Selbsttestverfahren für inhaltsadressierbare Speicher Expired - Fee Related DE69116919T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/502,965 US5107501A (en) 1990-04-02 1990-04-02 Built-in self-test technique for content-addressable memories

Publications (2)

Publication Number Publication Date
DE69116919D1 true DE69116919D1 (de) 1996-03-21
DE69116919T2 DE69116919T2 (de) 1996-06-27

Family

ID=24000194

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69116919T Expired - Fee Related DE69116919T2 (de) 1990-04-02 1991-03-26 Selbsttestverfahren für inhaltsadressierbare Speicher

Country Status (5)

Country Link
US (1) US5107501A (de)
EP (1) EP0451985B1 (de)
JP (1) JPH04228199A (de)
KR (1) KR940011427B1 (de)
DE (1) DE69116919T2 (de)

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US5511164A (en) * 1995-03-01 1996-04-23 Unisys Corporation Method and apparatus for determining the source and nature of an error within a computer system
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US5640509A (en) * 1995-10-03 1997-06-17 Intel Corporation Programmable built-in self-test function for an integrated circuit
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US6148364A (en) * 1997-12-30 2000-11-14 Netlogic Microsystems, Inc. Method and apparatus for cascading content addressable memory devices
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US6219748B1 (en) 1998-05-11 2001-04-17 Netlogic Microsystems, Inc. Method and apparatus for implementing a learn instruction in a content addressable memory device
US6240485B1 (en) 1998-05-11 2001-05-29 Netlogic Microsystems, Inc. Method and apparatus for implementing a learn instruction in a depth cascaded content addressable memory system
US6381673B1 (en) 1998-07-06 2002-04-30 Netlogic Microsystems, Inc. Method and apparatus for performing a read next highest priority match instruction in a content addressable memory device
US6330696B1 (en) * 1998-08-13 2001-12-11 Agere Systems Guardian Corp Self-testing of DRAMs for multiple faults
US6499081B1 (en) 1999-02-23 2002-12-24 Netlogic Microsystems, Inc. Method and apparatus for determining a longest prefix match in a segmented content addressable memory device
US6539455B1 (en) 1999-02-23 2003-03-25 Netlogic Microsystems, Inc. Method and apparatus for determining an exact match in a ternary content addressable memory device
US6460112B1 (en) 1999-02-23 2002-10-01 Netlogic Microsystems, Llc Method and apparatus for determining a longest prefix match in a content addressable memory device
US6574702B2 (en) 1999-02-23 2003-06-03 Netlogic Microsystems, Inc. Method and apparatus for determining an exact match in a content addressable memory device
US6892272B1 (en) 1999-02-23 2005-05-10 Netlogic Microsystems, Inc. Method and apparatus for determining a longest prefix match in a content addressable memory device
US6137707A (en) * 1999-03-26 2000-10-24 Netlogic Microsystems Method and apparatus for simultaneously performing a plurality of compare operations in content addressable memory device
US6286116B1 (en) * 1999-03-26 2001-09-04 Compaq Computer Corporation Built-in test method for content addressable memories
IT1308100B1 (it) * 1999-05-17 2001-11-29 Cselt Centro Studi Lab Telecom Perfezionamenti alle memorie indirizzabili mediante il contenuto
US6496950B1 (en) * 1999-08-11 2002-12-17 Lsi Logic Corporation Testing content addressable static memories
US6392910B1 (en) 1999-09-10 2002-05-21 Sibercore Technologies, Inc. Priority encoder with multiple match function for content addressable memories and methods for implementing the same
US6934795B2 (en) * 1999-09-23 2005-08-23 Netlogic Microsystems, Inc. Content addressable memory with programmable word width and programmable priority
US6944709B2 (en) * 1999-09-23 2005-09-13 Netlogic Microsystems, Inc. Content addressable memory with block-programmable mask write mode, word width and priority
US7143231B1 (en) 1999-09-23 2006-11-28 Netlogic Microsystems, Inc. Method and apparatus for performing packet classification for policy-based packet routing
US7110407B1 (en) 1999-09-23 2006-09-19 Netlogic Microsystems, Inc. Method and apparatus for performing priority encoding in a segmented classification system using enable signals
US6567340B1 (en) 1999-09-23 2003-05-20 Netlogic Microsystems, Inc. Memory storage cell based array of counters
US7487200B1 (en) 1999-09-23 2009-02-03 Netlogic Microsystems, Inc. Method and apparatus for performing priority encoding in a segmented classification system
US7272027B2 (en) * 1999-09-23 2007-09-18 Netlogic Microsystems, Inc. Priority circuit for content addressable memory
US6543016B1 (en) 1999-11-04 2003-04-01 Agere Systems Inc. Testing content-addressable memories
US6550034B1 (en) * 2000-02-17 2003-04-15 Hewlett Packard Development Company, L.P. Built-in self test for content addressable memory
JP3508849B2 (ja) * 2000-07-12 2004-03-22 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体装置および半導体装置の検査方法
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US7237156B1 (en) 2001-08-03 2007-06-26 Netlogic Microsystems, Inc. Content addressable memory with error detection
US7257763B1 (en) 2001-08-03 2007-08-14 Netlogic Microsystems, Inc. Content addressable memory with error signaling
US6914795B1 (en) * 2001-08-03 2005-07-05 Netlogic Microsystems, Inc. Content addressable memory with selective error logging
US7283380B1 (en) 2001-08-03 2007-10-16 Netlogic Microsystems, Inc. Content addressable memory with selective error logging
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US7301961B1 (en) 2001-12-27 2007-11-27 Cypress Semiconductor Corportion Method and apparatus for configuring signal lines according to idle codes
US7174419B1 (en) * 2003-05-30 2007-02-06 Netlogic Microsystems, Inc Content addressable memory device with source-selecting data translator
CN100365787C (zh) * 2003-07-29 2008-01-30 华为技术有限公司 支持写缓冲的flash内部单元测试方法
US7428672B2 (en) * 2003-08-27 2008-09-23 Micron Technology, Inc. Apparatus and methods for testing memory devices
US7219276B2 (en) * 2003-10-07 2007-05-15 Micron Technology, Inc. Testing CMOS CAM with redundancy
US7304873B1 (en) 2005-01-25 2007-12-04 Netlogic Microsystems, Inc. Method for on-the-fly error correction in a content addressable memory (CAM) and device therefor
CN101310343B (zh) * 2005-11-14 2014-04-30 三菱电机株式会社 存储器诊断装置
EP2100308B1 (de) * 2006-12-07 2011-07-06 Continental Teves AG & Co. oHG Verfahren und halbleiterspeicher mit einer einrichtung zur erkennung von adressierungsfehlern
US8570053B1 (en) 2007-07-03 2013-10-29 Cypress Semiconductor Corporation Capacitive field sensor with sigma-delta modulator
US8169238B1 (en) 2007-07-03 2012-05-01 Cypress Semiconductor Corporation Capacitance to frequency converter
TWI382423B (zh) * 2008-04-18 2013-01-11 Realtek Semiconductor Corp 記憶裝置及其測試方法
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Also Published As

Publication number Publication date
US5107501A (en) 1992-04-21
JPH04228199A (ja) 1992-08-18
EP0451985A2 (de) 1991-10-16
KR910018907A (ko) 1991-11-30
EP0451985B1 (de) 1996-02-07
KR940011427B1 (ko) 1994-12-15
DE69116919T2 (de) 1996-06-27
EP0451985A3 (en) 1992-09-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee