DE69032969D1 - Diskettenspeichersteuerung mit Richtigkeitsprüfung von DMA-Operationen - Google Patents
Diskettenspeichersteuerung mit Richtigkeitsprüfung von DMA-OperationenInfo
- Publication number
- DE69032969D1 DE69032969D1 DE69032969T DE69032969T DE69032969D1 DE 69032969 D1 DE69032969 D1 DE 69032969D1 DE 69032969 T DE69032969 T DE 69032969T DE 69032969 T DE69032969 T DE 69032969T DE 69032969 D1 DE69032969 D1 DE 69032969D1
- Authority
- DE
- Germany
- Prior art keywords
- floppy disk
- signal
- disk controller
- disk control
- dma operations
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Bus Control (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Computer And Data Communications (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US43166789A | 1989-11-03 | 1989-11-03 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69032969D1 true DE69032969D1 (de) | 1999-04-08 |
DE69032969T2 DE69032969T2 (de) | 1999-07-08 |
Family
ID=23712925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69032969T Expired - Fee Related DE69032969T2 (de) | 1989-11-03 | 1990-10-31 | Diskettenspeichersteuerung mit Richtigkeitsprüfung von DMA-Operationen |
Country Status (7)
Country | Link |
---|---|
US (2) | US5307476A (de) |
EP (1) | EP0426156B1 (de) |
JP (1) | JP3431025B2 (de) |
KR (1) | KR0148474B1 (de) |
AT (1) | ATE177220T1 (de) |
CA (1) | CA2028378A1 (de) |
DE (1) | DE69032969T2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2028378A1 (en) * | 1989-11-03 | 1991-05-04 | Timothy K. Waldrop | Floppy disk controller with dma verify operations |
US5642489A (en) * | 1994-12-19 | 1997-06-24 | International Business Machines Corporation | Bridge between two buses of a computer system with a direct memory access controller with accessible registers to support power management |
US5752081A (en) * | 1995-06-08 | 1998-05-12 | Vlsi Technology, Inc. | Signalling system and method for allowing a direct memory access (DMA) input/output (I/O) device on the peripheral component interconnect (PCI) bus to perform DMA transfers |
US5983002A (en) * | 1996-10-11 | 1999-11-09 | Phillip M. Adams & Associates, L.L.C. | Defective floppy diskette controller detection apparatus and method |
US6401222B1 (en) | 1996-10-11 | 2002-06-04 | Phillip M. Adams | Defective floppy diskette controller detection apparatus and method |
US20050038946A1 (en) * | 2003-08-12 | 2005-02-17 | Tadpole Computer, Inc. | System and method using a high speed interface in a system having co-processors |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1981001066A1 (en) * | 1979-10-11 | 1981-04-16 | Nanodata Computer Corp | Data processing system |
US4527237A (en) * | 1979-10-11 | 1985-07-02 | Nanodata Computer Corporation | Data processing system |
US4371929A (en) * | 1980-05-05 | 1983-02-01 | Ibm Corporation | Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory |
JPS57120146A (en) * | 1981-01-16 | 1982-07-27 | Hitachi Ltd | Data transfer device |
US4481578A (en) * | 1982-05-21 | 1984-11-06 | Pitney Bowes Inc. | Direct memory access data transfer system for use with plural processors |
US4530053A (en) * | 1983-04-14 | 1985-07-16 | International Business Machines Corporation | DMA multimode transfer controls |
US4764896A (en) * | 1985-07-01 | 1988-08-16 | Honeywell Inc. | Microprocessor assisted memory to memory move apparatus |
JPS6375955A (ja) * | 1986-09-19 | 1988-04-06 | Fujitsu Ltd | プログラムモ−ド・アクセス制御方式 |
JP2559394B2 (ja) * | 1987-02-16 | 1996-12-04 | 株式会社日立製作所 | 通信制御装置 |
US5056010A (en) * | 1989-10-30 | 1991-10-08 | Industrial Technology Research Institute | Pointer based DMA controller |
CA2028378A1 (en) * | 1989-11-03 | 1991-05-04 | Timothy K. Waldrop | Floppy disk controller with dma verify operations |
-
1990
- 1990-10-23 CA CA002028378A patent/CA2028378A1/en not_active Abandoned
- 1990-10-31 AT AT90120910T patent/ATE177220T1/de not_active IP Right Cessation
- 1990-10-31 EP EP90120910A patent/EP0426156B1/de not_active Expired - Lifetime
- 1990-10-31 DE DE69032969T patent/DE69032969T2/de not_active Expired - Fee Related
- 1990-11-03 KR KR1019900017835A patent/KR0148474B1/ko not_active IP Right Cessation
- 1990-11-05 JP JP29968190A patent/JP3431025B2/ja not_active Expired - Fee Related
-
1992
- 1992-12-29 US US07/999,470 patent/US5307476A/en not_active Expired - Lifetime
-
1993
- 1993-12-07 US US08/163,165 patent/US5442753A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0426156B1 (de) | 1999-03-03 |
JP3431025B2 (ja) | 2003-07-28 |
ATE177220T1 (de) | 1999-03-15 |
EP0426156A3 (en) | 1995-03-15 |
JPH03171355A (ja) | 1991-07-24 |
CA2028378A1 (en) | 1991-05-04 |
KR910010327A (ko) | 1991-06-29 |
US5307476A (en) | 1994-04-26 |
KR0148474B1 (ko) | 1998-11-16 |
DE69032969T2 (de) | 1999-07-08 |
US5442753A (en) | 1995-08-15 |
EP0426156A2 (de) | 1991-05-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW260769B (de) | ||
DE69032969T2 (de) | Diskettenspeichersteuerung mit Richtigkeitsprüfung von DMA-Operationen | |
DE69130721D1 (de) | Mikrorechnerbussteuerungssystem | |
JPH022706U (de) | ||
KR880011679A (ko) | Dma 억세스 중재 장치 | |
JPS6468830A (en) | Memory data arithmetic processing unit | |
KR870005318A (ko) | 패턴 인식시 최소거리 분류 방법 | |
KR930008577A (ko) | 타이머 인터럽트의 영향을 받지 않는 슬립모드 회로 | |
JPS57196360A (en) | Output register control system | |
JPS5929902B2 (ja) | 割込信号処理方式 | |
JPH0191953U (de) | ||
KR970044916A (ko) | 엔진제어장치의 소프트웨어수행 판단회로 | |
JPH0424888B2 (de) | ||
ES2115036T3 (es) | Circuito integrado de aplicacion especifica con microprocesador y medios de comprobacion. | |
SU1697522A1 (ru) | Устройство для измерения магнитной восприимчивости рудных материалов | |
JPH01226063A (ja) | バス優先制御方法および該方法を実施するバス・アービタ | |
JPS618632U (ja) | コンベア追従装置 | |
FR1413410A (fr) | Perfectionnements au mode de fixation des diffuseurs de luminaires et analogues | |
JPS58109337U (ja) | 入力回路 | |
KR860009348A (ko) | Real Time Image 디지탈 변환기의 DMA 제어회로 | |
ATE13365T1 (de) | Mikroprozessorsystem. | |
JPS6446865A (en) | Microprocessor | |
JPH0216457U (de) | ||
JPS6481040A (en) | System for deciding application rule | |
JPS6433792A (en) | Refresh interval timer |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |