ES2115036T3 - Circuito integrado de aplicacion especifica con microprocesador y medios de comprobacion. - Google Patents

Circuito integrado de aplicacion especifica con microprocesador y medios de comprobacion.

Info

Publication number
ES2115036T3
ES2115036T3 ES93402518T ES93402518T ES2115036T3 ES 2115036 T3 ES2115036 T3 ES 2115036T3 ES 93402518 T ES93402518 T ES 93402518T ES 93402518 T ES93402518 T ES 93402518T ES 2115036 T3 ES2115036 T3 ES 2115036T3
Authority
ES
Spain
Prior art keywords
microprocessor
asic
output
functional
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93402518T
Other languages
English (en)
Inventor
Patrick Darnault
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sagem SA
Original Assignee
Sagem SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sagem SA filed Critical Sagem SA
Application granted granted Critical
Publication of ES2115036T3 publication Critical patent/ES2115036T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)
  • Communication Control (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Storage Device Security (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

CIRCUITO INTEGRADO DE APLICACION ESPECIFICA (ASIC), QUE COMPRENDE UN MICROPROCESADOR (1), EN EL CUAL AL MENOS UNA ENTRADA FUNCIONAL (16) ESTA UNIDA A UNA SALIDA FUNCIONAL (15) DE UN CIRCUITO ELECTRICO DEL ASIC Y EN EL CUAL AL MENOS UNA SALIDA FUNCIONAL (11) ESTA UNIDA A UNA ENTRADA FUNCIONAL DE UN CIRCUITO ELECTRONICO DE DICHO ASIC, EL ASIC INCLUYE MEDIOS (9, 30) PARA DESVIAR AL MENOS UNA ENTRADA FUNCIONAL (16) DEL MICROPROCESADOR A LA SALIDA (9) DEL ASIC Y MEDIOS (21, 24) PARA DESVIAR AL MENOS UNA SALIDA FUNCIONAL (11) DEL MICROPROCESADOR A LA ENTRADA/SALIDA (8) DEL ASIC, EN EL CUAL EL ASIC INCLUYE ADEMAS MEDIOS (24, 41, 42, 45, 50) DE INHIBICION DE CIRCUITOS ELECTRONICOS (2, 3, 4, 5) Y DEL MICROPROCESADOR (1) DISPUESTOS PARA INHIBIR DICHA SALIDA FUNCIONAL (11) DEL MICROPROCESADOR Y AL MENOS UNA PUERTA ELECTRONICA (21), CONECTADA EN SERIE ENTRE DICHA SALIDA (11) DEL MICROPROCESADOR Y LA ENTRADA/SALIDA (8) DEL ASIC DONDE ES DESVIADA Y QUE ASEGURA EL PASO DE SEÑALES EN UN SENTIDO, DISPUESTAPARA QUE SU SENTIDO DE PASO SE INVIERTA BAJO EL MANDO DE DICHOS MEDIOS DE INHIBICION (24). APLICACION A LOS ORDENADORES.
ES93402518T 1992-10-22 1993-10-13 Circuito integrado de aplicacion especifica con microprocesador y medios de comprobacion. Expired - Lifetime ES2115036T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9212647A FR2697356B1 (fr) 1992-10-22 1992-10-22 Circuit intégré à la demande à microprocesseur.

Publications (1)

Publication Number Publication Date
ES2115036T3 true ES2115036T3 (es) 1998-06-16

Family

ID=9434781

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93402518T Expired - Lifetime ES2115036T3 (es) 1992-10-22 1993-10-13 Circuito integrado de aplicacion especifica con microprocesador y medios de comprobacion.

Country Status (9)

Country Link
EP (1) EP0594478B1 (es)
JP (1) JPH06208478A (es)
AT (1) ATE163100T1 (es)
CA (1) CA2108824A1 (es)
DE (1) DE69316823T2 (es)
DK (1) DK0594478T3 (es)
ES (1) ES2115036T3 (es)
FR (1) FR2697356B1 (es)
GR (1) GR3026763T3 (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5724502A (en) * 1995-08-07 1998-03-03 International Business Machines Corporation Test mode matrix circuit for an embedded microprocessor core

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990013043A1 (en) * 1989-04-18 1990-11-01 Vlsi Technology, Inc. Method for automatic isolation of functional blocks within integrated circuits
DE9000825U1 (de) * 1990-01-25 1990-03-29 Siemens AG, 1000 Berlin und 8000 München Integrierter Schaltkreis
JP2619112B2 (ja) * 1990-05-16 1997-06-11 株式会社東芝 情報処理装置のテスト容易化回路

Also Published As

Publication number Publication date
FR2697356B1 (fr) 1994-12-09
FR2697356A1 (fr) 1994-04-29
EP0594478B1 (fr) 1998-02-04
ATE163100T1 (de) 1998-02-15
DK0594478T3 (da) 1998-09-23
EP0594478A1 (fr) 1994-04-27
GR3026763T3 (en) 1998-07-31
DE69316823T2 (de) 1998-09-10
JPH06208478A (ja) 1994-07-26
CA2108824A1 (fr) 1994-04-23
DE69316823D1 (de) 1998-03-12

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