DE69032654T2 - Leiterstruktur für eine integrierte Schaltung - Google Patents

Leiterstruktur für eine integrierte Schaltung

Info

Publication number
DE69032654T2
DE69032654T2 DE69032654T DE69032654T DE69032654T2 DE 69032654 T2 DE69032654 T2 DE 69032654T2 DE 69032654 T DE69032654 T DE 69032654T DE 69032654 T DE69032654 T DE 69032654T DE 69032654 T2 DE69032654 T2 DE 69032654T2
Authority
DE
Germany
Prior art keywords
leads
lead pattern
lead
bonding pads
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69032654T
Other languages
English (en)
Other versions
DE69032654D1 (de
Inventor
Mu Albert Tsung-Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69032654D1 publication Critical patent/DE69032654D1/de
Publication of DE69032654T2 publication Critical patent/DE69032654T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Multi-Conductor Connections (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE69032654T 1989-05-22 1990-04-25 Leiterstruktur für eine integrierte Schaltung Expired - Lifetime DE69032654T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US35464789A 1989-05-22 1989-05-22

Publications (2)

Publication Number Publication Date
DE69032654D1 DE69032654D1 (de) 1998-10-22
DE69032654T2 true DE69032654T2 (de) 1999-04-15

Family

ID=23394320

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69032654T Expired - Lifetime DE69032654T2 (de) 1989-05-22 1990-04-25 Leiterstruktur für eine integrierte Schaltung

Country Status (4)

Country Link
EP (1) EP0399661B1 (de)
JP (1) JP2889954B2 (de)
AT (1) ATE171307T1 (de)
DE (1) DE69032654T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3784244B2 (ja) * 2000-06-30 2006-06-07 京セラ株式会社 多層配線基板

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2940593A1 (de) * 1979-10-06 1981-04-16 Ibm Deutschland Gmbh, 7000 Stuttgart Mehrlagen-modul mit konstantem wellenwiderstand
US4535388A (en) * 1984-06-29 1985-08-13 International Business Machines Corporation High density wired module
CA1246755A (en) * 1985-03-30 1988-12-13 Akira Miyauchi Semiconductor device
CA1305255C (en) * 1986-08-25 1992-07-14 Joseph Lebowitz Marching interconnecting lines in semiconductor integrated circuits
JPS6386554A (ja) * 1986-09-30 1988-04-16 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション 電子的パッケ−ジ
GB2207558B (en) * 1987-07-11 1991-10-30 Abdul Hamed Printed circuit boards
JPS6442158A (en) * 1987-08-10 1989-02-14 Nec Corp Hybrid integrated circuit device

Also Published As

Publication number Publication date
EP0399661B1 (de) 1998-09-16
EP0399661A2 (de) 1990-11-28
JPH0327564A (ja) 1991-02-05
JP2889954B2 (ja) 1999-05-10
DE69032654D1 (de) 1998-10-22
ATE171307T1 (de) 1998-10-15
EP0399661A3 (de) 1992-01-08

Similar Documents

Publication Publication Date Title
US5027191A (en) Cavity-down chip carrier with pad grid array
EP0720232A4 (de) Viel-chip-modul
TW343425B (en) Circuit elements mounting
US6777620B1 (en) Circuit board
TW342580B (en) Printed circuit assembly and method of manufacture therefor
TW363335B (en) Structure of a thermally and electrically enhanced plastic ball grid array package
KR930011201A (ko) 반도체 장치
DE69403981T2 (de) Montagestruktur von Kondensatoren für Leiterplatten
MY118245A (en) Multilayer printed circuit boards
US5093761A (en) Circuit board device
EP0364056A3 (de) Oberflächenmontierter Entkopplungskondensator
WO2002100140A3 (de) Leiterplatte mit mindestens einem elektronischen bauteil
US5955704A (en) Optimal PWA high density routing to minimize EMI substrate coupling in a computer system
EP1041618A4 (de) Halbleiteranordnung und verfahren zu diesen herstellung, leiterplatte und elektronische anlage
ATE171307T1 (de) Leiterstruktur für eine integrierte schaltung
JP2001119118A (ja) 発信器の取付構造
JPH09307208A (ja) フレキシブルプリント基板の接続端部構造
EP0398628A3 (de) Halbleiter-Speicheranordnung
WO2001059884A3 (en) Panel system for communication jacks
CA2103328A1 (en) Electronic Circuit Board Arrangements
JPH0231800Y2 (de)
US20030234403A1 (en) Optical package structure
JPH0230843Y2 (de)
JPH06120658A (ja) 電源供給部を付加したプリント基板の製造方法
JPS5920675U (ja) 印刷配線板の積層構造

Legal Events

Date Code Title Description
8364 No opposition during term of opposition