DE69027349D1 - Ladungsverschiebeanordnung und Verfahren zu deren Herstellung - Google Patents

Ladungsverschiebeanordnung und Verfahren zu deren Herstellung

Info

Publication number
DE69027349D1
DE69027349D1 DE69027349T DE69027349T DE69027349D1 DE 69027349 D1 DE69027349 D1 DE 69027349D1 DE 69027349 T DE69027349 T DE 69027349T DE 69027349 T DE69027349 T DE 69027349T DE 69027349 D1 DE69027349 D1 DE 69027349D1
Authority
DE
Germany
Prior art keywords
manufacture
transfer device
charge transfer
charge
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027349T
Other languages
English (en)
Other versions
DE69027349T2 (de
Inventor
Akio Izumi
Yasuhito Maki
Tadakuni Narabu
Maki Sato
Koji Otsu
Katsuyuki Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69027349D1 publication Critical patent/DE69027349D1/de
Publication of DE69027349T2 publication Critical patent/DE69027349T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76866—Surface Channel CCD
    • H01L29/76875—Two-Phase CCD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/1057—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components comprising charge coupled devices [CCD] or charge injection devices [CID]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
DE1990627349 1989-02-21 1990-02-20 Ladungsverschiebeanordnung und Verfahren zu deren Herstellung Expired - Fee Related DE69027349T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1040995A JP3057683B2 (ja) 1989-02-21 1989-02-21 非破壊読み出し型電荷転送装置とその製造方法

Publications (2)

Publication Number Publication Date
DE69027349D1 true DE69027349D1 (de) 1996-07-18
DE69027349T2 DE69027349T2 (de) 1996-11-28

Family

ID=12596010

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1990627349 Expired - Fee Related DE69027349T2 (de) 1989-02-21 1990-02-20 Ladungsverschiebeanordnung und Verfahren zu deren Herstellung

Country Status (3)

Country Link
EP (1) EP0384692B1 (de)
JP (1) JP3057683B2 (de)
DE (1) DE69027349T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5241198A (en) * 1990-11-26 1993-08-31 Matsushita Electronics Corporation Charge-coupled device and solid-state imaging device
JP2642523B2 (ja) * 1991-03-19 1997-08-20 株式会社東芝 電荷結合素子を持つ半導体集積回路装置の製造方法
JP3214432B2 (ja) 1998-02-04 2001-10-02 日本電気株式会社 固体撮像装置の製造方法
JP6045391B2 (ja) * 2013-02-22 2016-12-14 京セラドキュメントソリューションズ株式会社 段ボール箱の開封構造及び段ボール箱

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2004694A (en) * 1977-08-19 1979-04-04 Gen Electric Co Ltd Methods of manufacturing semiconductor devices
JPS5815271A (ja) * 1981-07-21 1983-01-28 Nec Corp 電荷結合素子
US4614960A (en) * 1983-07-15 1986-09-30 Westinghouse Electric Corp. Focal plane array

Also Published As

Publication number Publication date
EP0384692B1 (de) 1996-06-12
JP3057683B2 (ja) 2000-07-04
JPH02220450A (ja) 1990-09-03
EP0384692A2 (de) 1990-08-29
DE69027349T2 (de) 1996-11-28
EP0384692A3 (en) 1990-10-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee