DE69023718D1 - Verfahren zur Herstellung einer Verbindungshalbleiterschicht. - Google Patents

Verfahren zur Herstellung einer Verbindungshalbleiterschicht.

Info

Publication number
DE69023718D1
DE69023718D1 DE69023718T DE69023718T DE69023718D1 DE 69023718 D1 DE69023718 D1 DE 69023718D1 DE 69023718 T DE69023718 T DE 69023718T DE 69023718 T DE69023718 T DE 69023718T DE 69023718 D1 DE69023718 D1 DE 69023718D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor layer
compound semiconductor
compound
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69023718T
Other languages
English (en)
Other versions
DE69023718T2 (de
Inventor
Takashi Eshita
Toshikazu Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69023718D1 publication Critical patent/DE69023718D1/de
Application granted granted Critical
Publication of DE69023718T2 publication Critical patent/DE69023718T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02461—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
DE1990623718 1989-08-17 1990-08-14 Verfahren zur Herstellung einer Verbindungshalbleiterschicht. Expired - Fee Related DE69023718T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21065089A JP2848404B2 (ja) 1989-08-17 1989-08-17 ▲ｉｉｉ▼―▲ｖ▼族化合物半導体層の形成方法

Publications (2)

Publication Number Publication Date
DE69023718D1 true DE69023718D1 (de) 1996-01-04
DE69023718T2 DE69023718T2 (de) 1996-04-18

Family

ID=16592823

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1990623718 Expired - Fee Related DE69023718T2 (de) 1989-08-17 1990-08-14 Verfahren zur Herstellung einer Verbindungshalbleiterschicht.

Country Status (3)

Country Link
EP (1) EP0413546B1 (de)
JP (1) JP2848404B2 (de)
DE (1) DE69023718T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69330845T2 (de) * 1992-03-26 2002-04-04 Canon Kk Methoden für das Wachstum von Verbindungshalbleiterschichten
JP3093904B2 (ja) * 1993-02-16 2000-10-03 富士通株式会社 化合物半導体結晶の成長方法
US5456206A (en) * 1994-12-07 1995-10-10 Electronics And Telecommunications Research Institute Method for two-dimensional epitaxial growth of III-V compound semiconductors
US5926726A (en) * 1997-09-12 1999-07-20 Sdl, Inc. In-situ acceptor activation in group III-v nitride compound semiconductors
WO2006009038A1 (ja) 2004-07-21 2006-01-26 Sharp Kabushiki Kaisha アクティブマトリクス型表示装置およびそれに用いられる駆動制御回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4632712A (en) * 1983-09-12 1986-12-30 Massachusetts Institute Of Technology Reducing dislocations in semiconductors utilizing repeated thermal cycling during multistage epitaxial growth
US4835116A (en) * 1987-11-13 1989-05-30 Kopin Corporation Annealing method for III-V deposition

Also Published As

Publication number Publication date
JPH0374839A (ja) 1991-03-29
JP2848404B2 (ja) 1999-01-20
EP0413546A1 (de) 1991-02-20
EP0413546B1 (de) 1995-11-22
DE69023718T2 (de) 1996-04-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee