DE69009157D1 - Integrierte Schaltung mit Speicher und ihr Herstellungsverfahren. - Google Patents

Integrierte Schaltung mit Speicher und ihr Herstellungsverfahren.

Info

Publication number
DE69009157D1
DE69009157D1 DE69009157T DE69009157T DE69009157D1 DE 69009157 D1 DE69009157 D1 DE 69009157D1 DE 69009157 T DE69009157 T DE 69009157T DE 69009157 T DE69009157 T DE 69009157T DE 69009157 D1 DE69009157 D1 DE 69009157D1
Authority
DE
Germany
Prior art keywords
memory
integrated circuit
manufacturing process
manufacturing
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69009157T
Other languages
English (en)
Other versions
DE69009157T2 (de
Inventor
Albert Bergemont
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Application granted granted Critical
Publication of DE69009157D1 publication Critical patent/DE69009157D1/de
Publication of DE69009157T2 publication Critical patent/DE69009157T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0925—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising an N-well only in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69009157T 1989-11-28 1990-11-22 Integrierte Schaltung mit Speicher und ihr Herstellungsverfahren. Expired - Fee Related DE69009157T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8916007A FR2655197B1 (fr) 1989-11-28 1989-11-28 Circuit integre comprenant des memoires et son procede de fabrication.

Publications (2)

Publication Number Publication Date
DE69009157D1 true DE69009157D1 (de) 1994-06-30
DE69009157T2 DE69009157T2 (de) 1994-09-08

Family

ID=9388127

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69009157T Expired - Fee Related DE69009157T2 (de) 1989-11-28 1990-11-22 Integrierte Schaltung mit Speicher und ihr Herstellungsverfahren.

Country Status (5)

Country Link
EP (1) EP0432057B1 (de)
JP (1) JP3198512B2 (de)
KR (1) KR910010714A (de)
DE (1) DE69009157T2 (de)
FR (1) FR2655197B1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003060087A (ja) * 2001-08-10 2003-02-28 Mitsubishi Electric Corp 半導体記憶装置
JP4806250B2 (ja) * 2004-11-12 2011-11-02 台湾積體電路製造股▲ふん▼有限公司 多種動作電圧を有する集積回路分離用半導体構造

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55146956A (en) * 1979-05-02 1980-11-15 Fujitsu Ltd Semiconductor element having function for avoiding generation of soft error due to alpha ray
US4706107A (en) * 1981-06-04 1987-11-10 Nippon Electric Co., Ltd. IC memory cells with reduced alpha particle influence
JPS5958860A (ja) * 1982-09-29 1984-04-04 Toshiba Corp 半導体記憶装置
JPH01147854A (ja) * 1987-12-04 1989-06-09 Nissan Motor Co Ltd 半導体装置

Also Published As

Publication number Publication date
KR910010714A (ko) 1991-06-29
EP0432057B1 (de) 1994-05-25
EP0432057A1 (de) 1991-06-12
FR2655197A1 (fr) 1991-05-31
DE69009157T2 (de) 1994-09-08
JP3198512B2 (ja) 2001-08-13
FR2655197B1 (fr) 1995-03-17
JPH03184373A (ja) 1991-08-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee