DE68927853T2 - Informationsverarbeitungsvorrichtung mit Cache-Speicher - Google Patents

Informationsverarbeitungsvorrichtung mit Cache-Speicher

Info

Publication number
DE68927853T2
DE68927853T2 DE68927853T DE68927853T DE68927853T2 DE 68927853 T2 DE68927853 T2 DE 68927853T2 DE 68927853 T DE68927853 T DE 68927853T DE 68927853 T DE68927853 T DE 68927853T DE 68927853 T2 DE68927853 T2 DE 68927853T2
Authority
DE
Germany
Prior art keywords
information processing
processing device
cache memory
cache
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68927853T
Other languages
English (en)
Other versions
DE68927853D1 (de
Inventor
Kenji Intellectual Prop Sakaue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Publication of DE68927853D1 publication Critical patent/DE68927853D1/de
Application granted granted Critical
Publication of DE68927853T2 publication Critical patent/DE68927853T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0853—Cache with multiport tag or data arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE68927853T 1988-12-27 1989-12-27 Informationsverarbeitungsvorrichtung mit Cache-Speicher Expired - Fee Related DE68927853T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63330149A JPH077355B2 (ja) 1988-12-27 1988-12-27 情報処理装置

Publications (2)

Publication Number Publication Date
DE68927853D1 DE68927853D1 (de) 1997-04-17
DE68927853T2 true DE68927853T2 (de) 1997-07-31

Family

ID=18229362

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68927853T Expired - Fee Related DE68927853T2 (de) 1988-12-27 1989-12-27 Informationsverarbeitungsvorrichtung mit Cache-Speicher

Country Status (4)

Country Link
EP (1) EP0376253B1 (de)
JP (1) JPH077355B2 (de)
KR (1) KR920005296B1 (de)
DE (1) DE68927853T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0485788A (ja) * 1990-07-27 1992-03-18 Toshiba Corp 多ポートキャッシュメモリ
JP3102594B2 (ja) * 1991-02-19 2000-10-23 松下電器産業株式会社 キャッシュメモリ装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4736293A (en) * 1984-04-11 1988-04-05 American Telephone And Telegraph Company, At&T Bell Laboratories Interleaved set-associative memory
US4646233A (en) * 1984-06-20 1987-02-24 Weatherford James R Physical cache unit for computer
JPS63157249A (ja) * 1986-12-22 1988-06-30 Nippon Telegr & Teleph Corp <Ntt> キヤツシユメモリ制御方式
JP2561261B2 (ja) * 1987-02-18 1996-12-04 株式会社日立製作所 バッファ記憶アクセス方法
EP0325422B1 (de) * 1988-01-20 1996-05-15 Advanced Micro Devices, Inc. Integrierte Cachespeichereinheit

Also Published As

Publication number Publication date
EP0376253A2 (de) 1990-07-04
KR920005296B1 (ko) 1992-06-29
DE68927853D1 (de) 1997-04-17
JPH02176839A (ja) 1990-07-10
EP0376253B1 (de) 1997-03-12
KR900010565A (ko) 1990-07-07
EP0376253A3 (de) 1991-09-11
JPH077355B2 (ja) 1995-01-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee