DE68927292T2 - Mikrorechner, geeignet zur Schnellverarbeitung eines Verzweigungsbefehlskodes - Google Patents

Mikrorechner, geeignet zur Schnellverarbeitung eines Verzweigungsbefehlskodes

Info

Publication number
DE68927292T2
DE68927292T2 DE68927292T DE68927292T DE68927292T2 DE 68927292 T2 DE68927292 T2 DE 68927292T2 DE 68927292 T DE68927292 T DE 68927292T DE 68927292 T DE68927292 T DE 68927292T DE 68927292 T2 DE68927292 T2 DE 68927292T2
Authority
DE
Germany
Prior art keywords
microcomputer
branch instruction
instruction code
quick processing
quick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68927292T
Other languages
English (en)
Other versions
DE68927292D1 (de
Inventor
Masahiro C O Nec Corpor Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE68927292D1 publication Critical patent/DE68927292D1/de
Application granted granted Critical
Publication of DE68927292T2 publication Critical patent/DE68927292T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
DE68927292T 1988-11-25 1989-11-27 Mikrorechner, geeignet zur Schnellverarbeitung eines Verzweigungsbefehlskodes Expired - Fee Related DE68927292T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29851388 1988-11-25

Publications (2)

Publication Number Publication Date
DE68927292D1 DE68927292D1 (de) 1996-11-07
DE68927292T2 true DE68927292T2 (de) 1997-05-07

Family

ID=17860693

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68927292T Expired - Fee Related DE68927292T2 (de) 1988-11-25 1989-11-27 Mikrorechner, geeignet zur Schnellverarbeitung eines Verzweigungsbefehlskodes

Country Status (3)

Country Link
US (1) US5099419A (de)
EP (1) EP0402524B1 (de)
DE (1) DE68927292T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69129872T2 (de) * 1990-03-27 1999-03-04 Philips Electronics Nv Datenverarbeitungssystem mit einem leistungsverbessernden Befehlscachespeicher
US5333280A (en) * 1990-04-06 1994-07-26 Nec Corporation Parallel pipelined instruction processing system for very long instruction word
JP2646855B2 (ja) * 1991-01-21 1997-08-27 三菱電機株式会社 データ処理装置
US5276825A (en) * 1991-03-12 1994-01-04 Chips & Technologies, Inc. Apparatus for quickly determining actual jump addresses by assuming each instruction of a plurality of fetched instructions is a jump instruction
US5454089A (en) * 1991-04-17 1995-09-26 Intel Corporation Branch look ahead adder for use in an instruction pipeline sequencer with multiple instruction decoding
US5323489A (en) * 1991-11-14 1994-06-21 Bird Peter L Method and apparatus employing lookahead to reduce memory bank contention for decoupled operand references
JP2761688B2 (ja) * 1992-02-07 1998-06-04 三菱電機株式会社 データ処理装置
JP2922723B2 (ja) * 1992-06-29 1999-07-26 キヤノン株式会社 情報処理装置
JP2801135B2 (ja) * 1993-11-26 1998-09-21 富士通株式会社 パイプラインプロセッサの命令読み出し方法及び命令読み出し装置
US5542109A (en) * 1994-08-31 1996-07-30 Exponential Technology, Inc. Address tracking and branch resolution in a processor with multiple execution pipelines and instruction stream discontinuities
JP3504355B2 (ja) * 1994-12-06 2004-03-08 松下電器産業株式会社 プロセッサ
US6092186A (en) * 1996-05-07 2000-07-18 Lucent Technologies Inc. Apparatus and method for aborting un-needed instruction fetches in a digital microprocessor device
JP3439033B2 (ja) * 1996-07-08 2003-08-25 株式会社日立製作所 割り込み制御装置及びプロセッサ
US6081860A (en) * 1997-11-20 2000-06-27 International Business Machines Corporation Address pipelining for data transfers
US7743238B2 (en) * 2003-05-09 2010-06-22 Arm Limited Accessing items of architectural state from a register cache in a data processing apparatus when performing branch prediction operations for an indirect branch instruction

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3764988A (en) * 1971-03-01 1973-10-09 Hitachi Ltd Instruction processing device using advanced control system
JPS549456B2 (de) * 1972-07-05 1979-04-24
US3881173A (en) * 1973-05-14 1975-04-29 Amdahl Corp Condition code determination and data processing
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
JPS5927935B2 (ja) * 1980-02-29 1984-07-09 株式会社日立製作所 情報処理装置
JPS573142A (en) * 1980-06-04 1982-01-08 Matsushita Electric Ind Co Ltd Instruction prefetching system
US4373180A (en) * 1980-07-09 1983-02-08 Sperry Corporation Microprogrammed control system capable of pipelining even when executing a conditional branch instruction
JPS5848144A (ja) * 1981-09-16 1983-03-22 Nec Corp デ−タ処理装置の分岐命令制御方式
US4604691A (en) * 1982-09-07 1986-08-05 Nippon Electric Co., Ltd. Data processing system having branch instruction prefetching performance
JPS60140435A (ja) * 1983-12-28 1985-07-25 Hitachi Ltd 命令処理装置
US4764861A (en) * 1984-02-08 1988-08-16 Nec Corporation Instruction fpefetching device with prediction of a branch destination for each branch count instruction
US4742451A (en) * 1984-05-21 1988-05-03 Digital Equipment Corporation Instruction prefetch system for conditional branch instruction for central processor unit
JPH0789319B2 (ja) * 1985-04-22 1995-09-27 株式会社日立製作所 デ−タ処理装置における先行制御装置
JPH0752390B2 (ja) * 1985-05-07 1995-06-05 株式会社日立製作所 命令処理装置
US4853840A (en) * 1986-01-07 1989-08-01 Nec Corporation Instruction prefetching device including a circuit for checking prediction of a branch instruction before the instruction is executed
DE3785897T2 (de) * 1986-02-28 1993-09-30 Nec Corp Steuervorrichtung zum vorabruf von befehlen.
US4860197A (en) * 1987-07-31 1989-08-22 Prime Computer, Inc. Branch cache system with instruction boundary determination independent of parcel boundary
DE3856299T2 (de) * 1987-11-12 1999-07-01 Matsushita Electric Ind Co Ltd Verarbeitungssystem für Verzweigungsbefehle

Also Published As

Publication number Publication date
DE68927292D1 (de) 1996-11-07
EP0402524A3 (de) 1992-07-01
EP0402524A2 (de) 1990-12-19
EP0402524B1 (de) 1996-10-02
US5099419A (en) 1992-03-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee