DE68913941D1 - Verfahren zur Herstellung einer Leiterplatte. - Google Patents

Verfahren zur Herstellung einer Leiterplatte.

Info

Publication number
DE68913941D1
DE68913941D1 DE89121802T DE68913941T DE68913941D1 DE 68913941 D1 DE68913941 D1 DE 68913941D1 DE 89121802 T DE89121802 T DE 89121802T DE 68913941 T DE68913941 T DE 68913941T DE 68913941 D1 DE68913941 D1 DE 68913941D1
Authority
DE
Germany
Prior art keywords
production
circuit board
printed circuit
printed
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE89121802T
Other languages
English (en)
Other versions
DE68913941T2 (de
Inventor
Shin Nippon Cmk Corpo Kawakami
Satoshi Nippon Cmk Co Haruyama
Hirotaka Nippon Cmk Co Okonogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon CMK Corp
Original Assignee
Nippon CMK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP30178188A external-priority patent/JPH02148792A/ja
Priority claimed from JP30178088A external-priority patent/JP2603863B2/ja
Application filed by Nippon CMK Corp filed Critical Nippon CMK Corp
Application granted granted Critical
Publication of DE68913941D1 publication Critical patent/DE68913941D1/de
Publication of DE68913941T2 publication Critical patent/DE68913941T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4685—Manufacturing of cross-over conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0373—Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
DE1989613941 1988-11-29 1989-11-25 Verfahren zur Herstellung einer Leiterplatte. Expired - Fee Related DE68913941T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP30178188A JPH02148792A (ja) 1988-11-29 1988-11-29 プリント配線板の製造方法
JP30178088A JP2603863B2 (ja) 1988-11-29 1988-11-29 プリント配線板

Publications (2)

Publication Number Publication Date
DE68913941D1 true DE68913941D1 (de) 1994-04-21
DE68913941T2 DE68913941T2 (de) 1994-10-20

Family

ID=26562871

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1989613941 Expired - Fee Related DE68913941T2 (de) 1988-11-29 1989-11-25 Verfahren zur Herstellung einer Leiterplatte.

Country Status (2)

Country Link
EP (1) EP0375954B1 (de)
DE (1) DE68913941T2 (de)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5210568A (en) * 1974-12-28 1977-01-26 Hideo Machida Method of manufacturing multilayered printed wiring substrate
DE2831984A1 (de) * 1977-07-21 1979-02-01 Sharp Kk Elektrische verbindung zwischen zwei auf getrennte traeger aufgebrachten elektrischen schaltkreisen
DE3704498A1 (de) * 1987-02-13 1988-08-25 Aristo Graphic Systeme Verfahren zur herstellung eines digitalisiertabletts

Also Published As

Publication number Publication date
EP0375954A1 (de) 1990-07-04
DE68913941T2 (de) 1994-10-20
EP0375954B1 (de) 1994-03-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee