DE60220300D1 - Schaltung zur detektion eines taktsignalverlusts und verfahren dazu - Google Patents
Schaltung zur detektion eines taktsignalverlusts und verfahren dazuInfo
- Publication number
- DE60220300D1 DE60220300D1 DE60220300T DE60220300T DE60220300D1 DE 60220300 D1 DE60220300 D1 DE 60220300D1 DE 60220300 T DE60220300 T DE 60220300T DE 60220300 T DE60220300 T DE 60220300T DE 60220300 D1 DE60220300 D1 DE 60220300D1
- Authority
- DE
- Germany
- Prior art keywords
- detecting
- circuit
- clock signal
- method therefor
- signal loss
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1604—Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
- H03L7/143—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by switching the reference signal of the phase-locked loop
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Manipulation Of Pulses (AREA)
- Tests Of Electronic Circuits (AREA)
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US31013601P | 2001-08-03 | 2001-08-03 | |
US310136P | 2001-08-03 | ||
PCT/US2002/024893 WO2003013000A2 (en) | 2001-08-03 | 2002-08-05 | Clock loss detection and switchover circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60220300D1 true DE60220300D1 (de) | 2007-07-05 |
DE60220300T2 DE60220300T2 (de) | 2008-01-17 |
Family
ID=23201141
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60220300T Expired - Fee Related DE60220300T2 (de) | 2001-08-03 | 2002-08-05 | Schaltung zur detektion eines taktsignalverlusts und verfahren dazu |
Country Status (7)
Country | Link |
---|---|
US (3) | US6891401B2 (de) |
EP (1) | EP1433059B1 (de) |
JP (2) | JP4009592B2 (de) |
CN (2) | CN101599034B (de) |
AU (1) | AU2002326532A1 (de) |
DE (1) | DE60220300T2 (de) |
WO (1) | WO2003013000A2 (de) |
Families Citing this family (45)
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US6931087B1 (en) * | 1998-04-17 | 2005-08-16 | Invensys Systems, Inc. | Feedforward clock switching circuit |
US6378465B1 (en) | 1999-10-15 | 2002-04-30 | Protecta International, Inc. | Full-body safety harness |
DE60220300T2 (de) | 2001-08-03 | 2008-01-17 | Altera Corp., San Jose | Schaltung zur detektion eines taktsignalverlusts und verfahren dazu |
CN1172450C (zh) * | 2002-05-22 | 2004-10-20 | 华为技术有限公司 | 网络设备中提供时钟的方法及其装置 |
US7356076B2 (en) * | 2002-11-01 | 2008-04-08 | Broadcom Corporation | System and method supporting auto-recovery in a transceiver system |
US20080140890A1 (en) * | 2004-02-27 | 2008-06-12 | Koninklijke Philips Electronics N.V. | Electronic Circuit Arrangement For Detecting a Failing Clock |
JP2006011704A (ja) * | 2004-06-24 | 2006-01-12 | Fujitsu Ltd | クロック切り替え回路 |
JP4862984B2 (ja) * | 2005-03-30 | 2012-01-25 | 日本電気株式会社 | クロック切り替え装置及びクロック切り替え方法 |
US8164368B2 (en) | 2005-04-19 | 2012-04-24 | Micron Technology, Inc. | Power savings mode for memory systems |
ITTO20050307A1 (it) * | 2005-05-06 | 2006-11-07 | St Microelectronics Srl | Circuito di commutazione fra segnali di clock e relativo procedimento |
US7519846B2 (en) * | 2005-12-28 | 2009-04-14 | Intel Corporation | Detection of an in-band reset |
US8199695B2 (en) * | 2007-04-10 | 2012-06-12 | International Business Machines Corporation | Clock signal synchronization among computers in a network |
US8161311B2 (en) | 2007-08-23 | 2012-04-17 | Stratus Technologies Bermuda Ltd | Apparatus and method for redundant and spread spectrum clocking |
US8909971B2 (en) * | 2007-09-03 | 2014-12-09 | Nxp B.V. | Clock supervision unit |
KR101446559B1 (ko) | 2008-03-24 | 2014-10-06 | 삼성전자주식회사 | 3차원 영상 시청을 위한 신호생성방법 및 이를 적용한영상시청장치 |
JP2009248502A (ja) * | 2008-04-09 | 2009-10-29 | Seiko Epson Corp | パルス信号生成装置、搬送装置、画像形成装置及びパルス生成方法 |
KR101502033B1 (ko) * | 2008-04-11 | 2015-03-12 | 삼성전자주식회사 | Adc의 전류 제어 회로 및 방법 |
US20090315597A1 (en) * | 2008-06-24 | 2009-12-24 | Subba Reddy Kallam | Clock Selection for a Communications Processor having a Sleep Mode |
WO2010076667A1 (en) * | 2009-01-05 | 2010-07-08 | Freescale Semiconductor, Inc. | Clock glitch detection circuit |
TWI347752B (en) * | 2009-04-30 | 2011-08-21 | Nat Chip Implementation Ct Nat Applied Res Lab | Edge-missing detector structure |
US8560875B2 (en) * | 2009-09-17 | 2013-10-15 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Apparatus for clock calibrating a less precise second clock signal with a more precise first clock signal wherein the first clock signal is inactive during a sniff mode and the second clock signal is active during a sniff mode |
US8228102B1 (en) * | 2010-03-03 | 2012-07-24 | Altera Corporation | Phase-locked loop architecture and clock distribution system |
WO2012131445A1 (en) * | 2011-03-30 | 2012-10-04 | Tejas Networks Limited | A method for zero traffic hit synchronization switchover in telecommunication network |
WO2011100918A2 (zh) * | 2011-04-13 | 2011-08-25 | 华为技术有限公司 | 复位装置 |
GB2503474B (en) * | 2012-06-27 | 2016-06-29 | Nordic Semiconductor Asa | Data transfer between clock domains |
CN103365757B (zh) * | 2013-07-29 | 2016-02-17 | 浙江中控技术股份有限公司 | 时钟检测方法及装置 |
US9258001B1 (en) | 2013-09-03 | 2016-02-09 | Cirrus Logic, Inc. | Dual-input oscillator for redundant phase-locked loop (PLL) operation |
US9395745B2 (en) | 2014-02-10 | 2016-07-19 | Analog Devices, Inc. | Redundant clock switchover |
CN103888109A (zh) * | 2014-04-21 | 2014-06-25 | 国家电网公司 | 一种检测时钟源故障的电路 |
KR101533092B1 (ko) * | 2014-05-14 | 2015-07-02 | 대우전자부품(주) | 차량용 전자식 스마트 변속 레버 장치 |
CN105703745B (zh) * | 2014-11-24 | 2019-01-04 | 中国科学院沈阳自动化研究所 | 一种时钟状态指示电路及方法 |
JP2017033325A (ja) * | 2015-08-03 | 2017-02-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9360883B1 (en) | 2015-08-26 | 2016-06-07 | Freescale Semiconductor, Inc. | Clock multiplexer for generating glitch-free clock signal |
US9490789B1 (en) | 2016-04-27 | 2016-11-08 | Freescale Semiconductor, Inc. | Glitch-free clock switching circuit using Muller C-elements |
EP3285401B1 (de) * | 2016-08-19 | 2020-01-29 | Aselsan Elektronik Sanayi ve Ticaret Anonim Sirketi | System und verfahren zur detektion des verlustes einer phasenregelung |
US10396922B2 (en) | 2017-02-07 | 2019-08-27 | Texas Instruments Incorporated | Apparatus and mechanism to support multiple time domains in a single soc for time sensitive network |
CN109412581A (zh) * | 2017-08-18 | 2019-03-01 | 杭州晶华微电子有限公司 | 一种时钟停振检测电路 |
WO2019118981A1 (en) * | 2017-12-17 | 2019-06-20 | Redpine Signals, Inc | Fine-grained clock resolution using low and high frequency clock sources in a low-power system |
US10700668B2 (en) * | 2018-06-15 | 2020-06-30 | Analog Devices Global Unlimited Company | Method and apparatus for pulse generation |
TWI714930B (zh) | 2018-12-21 | 2021-01-01 | 瑞昱半導體股份有限公司 | 控制系統、控制方法及其非暫態電腦可讀取媒體 |
CN110350914B (zh) * | 2019-06-18 | 2023-07-07 | 芯翼信息科技(上海)有限公司 | 一种片上系统 |
CN112214064B (zh) * | 2019-07-11 | 2022-11-11 | 珠海格力电器股份有限公司 | 应用于芯片系统的时钟控制方法及装置 |
CN110795289B (zh) * | 2019-10-29 | 2023-09-26 | 北京计算机技术及应用研究所 | 一种多时钟自动切换方法 |
KR20210131047A (ko) | 2020-04-23 | 2021-11-02 | 삼성전자주식회사 | 반도체 장치 및 반도체 시스템 |
CN116015255A (zh) * | 2022-12-30 | 2023-04-25 | 成都电科星拓科技有限公司 | 一种支持丢失自动切换的时钟无缝切换电路 |
Family Cites Families (25)
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US3708686A (en) * | 1970-04-30 | 1973-01-02 | Lorain Prod Corp | Frequency comparator |
US4156200A (en) * | 1978-03-20 | 1979-05-22 | Bell Telephone Laboratories, Incorporated | High reliability active-standby clock arrangement |
JPH02296411A (ja) * | 1989-05-11 | 1990-12-07 | Nec Corp | 受信クロック断検出回路 |
JPH03100815A (ja) * | 1989-09-14 | 1991-04-25 | Nec Field Service Ltd | クロック故障検出回路 |
US5065042A (en) * | 1990-08-01 | 1991-11-12 | Vlsi Technology, Inc. | Self-configuring clock interface circuit |
US5260979A (en) * | 1991-05-28 | 1993-11-09 | Codex Corp. | Circuit and method of switching between redundant clocks for a phase lock loop |
JPH06334500A (ja) * | 1993-05-19 | 1994-12-02 | Nec Corp | 入力信号異常検出回路 |
US5579353A (en) * | 1993-10-12 | 1996-11-26 | Texas Instruments Incorporated | Dynamic clock mode switch |
US5416443A (en) * | 1993-12-22 | 1995-05-16 | International Business Machines Corporation | Reliable clock source having a plurality of redundant oscillators |
US5642069A (en) * | 1994-04-26 | 1997-06-24 | Unisys Corporation | Clock signal loss detection and recovery apparatus in multiple clock signal system |
US5623223A (en) * | 1994-10-12 | 1997-04-22 | National Semiconductor Corporation | Glitchless clock switching circuit |
US5604452A (en) * | 1995-04-03 | 1997-02-18 | Exar Corporation | Clock generator using a state machine to switch between two offset clocks |
US5886557A (en) * | 1996-06-28 | 1999-03-23 | Emc Corporation | Redundant clock signal generating circuitry |
JPH10124167A (ja) * | 1996-10-17 | 1998-05-15 | Miyagi Oki Denki Kk | システムクロック切り換え装置 |
US5828243A (en) * | 1996-10-28 | 1998-10-27 | Mti Technology Corporation | Method for detecting clock failure and switching to backup clock |
US6078193A (en) * | 1998-04-06 | 2000-06-20 | Graychip, Inc. | Apparatus and method for providing a static mode for dynamic logic circuits |
US6078225A (en) * | 1998-07-21 | 2000-06-20 | Lucent Technologies Inc. | Switching algorithm for clock distribution function |
DE19844562B4 (de) * | 1998-09-29 | 2006-06-01 | Dr. Johannes Heidenhain Gmbh | Verfahren zur sicheren Überwachung von Taktraten in einem redundanten System |
US6194939B1 (en) * | 1999-09-21 | 2001-02-27 | Alcatel | Time-walking prevention in a digital switching implementation for clock selection |
US6453425B1 (en) * | 1999-11-23 | 2002-09-17 | Lsi Logic Corporation | Method and apparatus for switching clocks presented to synchronous SRAMs |
US6292045B1 (en) * | 1999-11-29 | 2001-09-18 | Zilog, Inc. | Circuit and method for detecting and selecting clock sources |
US6239626B1 (en) * | 2000-01-07 | 2001-05-29 | Cisco Technology, Inc. | Glitch-free clock selector |
US6535048B1 (en) * | 2000-02-08 | 2003-03-18 | Infineon Technologies North America Corp. | Secure asynchronous clock multiplexer |
US6452426B1 (en) * | 2001-04-16 | 2002-09-17 | Nagesh Tamarapalli | Circuit for switching between multiple clocks |
DE60220300T2 (de) | 2001-08-03 | 2008-01-17 | Altera Corp., San Jose | Schaltung zur detektion eines taktsignalverlusts und verfahren dazu |
-
2002
- 2002-08-05 DE DE60220300T patent/DE60220300T2/de not_active Expired - Fee Related
- 2002-08-05 CN CN200910159441.5A patent/CN101599034B/zh not_active Expired - Fee Related
- 2002-08-05 US US10/213,115 patent/US6891401B2/en not_active Expired - Lifetime
- 2002-08-05 JP JP2003518063A patent/JP4009592B2/ja not_active Expired - Fee Related
- 2002-08-05 WO PCT/US2002/024893 patent/WO2003013000A2/en active IP Right Grant
- 2002-08-05 AU AU2002326532A patent/AU2002326532A1/en not_active Abandoned
- 2002-08-05 CN CNB028190955A patent/CN100530127C/zh not_active Expired - Fee Related
- 2002-08-05 EP EP02761253A patent/EP1433059B1/de not_active Expired - Fee Related
-
2004
- 2004-08-09 US US10/915,201 patent/US7046048B2/en not_active Expired - Fee Related
-
2006
- 2006-04-04 US US11/398,384 patent/US7427881B2/en not_active Expired - Fee Related
-
2007
- 2007-04-26 JP JP2007117754A patent/JP4944664B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP4944664B2 (ja) | 2012-06-06 |
CN101599034B (zh) | 2016-03-02 |
JP2004537908A (ja) | 2004-12-16 |
DE60220300T2 (de) | 2008-01-17 |
US6891401B2 (en) | 2005-05-10 |
EP1433059A2 (de) | 2004-06-30 |
US7046048B2 (en) | 2006-05-16 |
EP1433059B1 (de) | 2007-05-23 |
US20060197558A1 (en) | 2006-09-07 |
CN1571957A (zh) | 2005-01-26 |
WO2003013000A3 (en) | 2004-04-29 |
US20030034820A1 (en) | 2003-02-20 |
WO2003013000A2 (en) | 2003-02-13 |
CN100530127C (zh) | 2009-08-19 |
US20050012525A1 (en) | 2005-01-20 |
JP4009592B2 (ja) | 2007-11-14 |
CN101599034A (zh) | 2009-12-09 |
AU2002326532A1 (en) | 2003-02-17 |
US7427881B2 (en) | 2008-09-23 |
JP2007209032A (ja) | 2007-08-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |