DE60215175D1 - Parallele datenübertragung mit niedrigem stromverbrauch - Google Patents

Parallele datenübertragung mit niedrigem stromverbrauch

Info

Publication number
DE60215175D1
DE60215175D1 DE60215175T DE60215175T DE60215175D1 DE 60215175 D1 DE60215175 D1 DE 60215175D1 DE 60215175 T DE60215175 T DE 60215175T DE 60215175 T DE60215175 T DE 60215175T DE 60215175 D1 DE60215175 D1 DE 60215175D1
Authority
DE
Germany
Prior art keywords
power consumption
data transmission
low power
parallel data
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60215175T
Other languages
English (en)
Other versions
DE60215175T2 (de
Inventor
Ivan Svestka
C Sessions
R Evoy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE60215175D1 publication Critical patent/DE60215175D1/de
Application granted granted Critical
Publication of DE60215175T2 publication Critical patent/DE60215175T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4086Bus impedance matching, e.g. termination
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)
  • Power Sources (AREA)
DE60215175T 2001-05-31 2002-05-28 Parallele datenübertragung mit niedrigem stromverbrauch Expired - Lifetime DE60215175T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US871160 1997-06-09
US09/871,160 US6859883B2 (en) 2001-05-31 2001-05-31 Parallel data communication consuming low power
PCT/IB2002/001918 WO2003107194A2 (en) 2001-05-31 2002-05-28 Parallel data communication consuming low power

Publications (2)

Publication Number Publication Date
DE60215175D1 true DE60215175D1 (de) 2006-11-16
DE60215175T2 DE60215175T2 (de) 2007-08-23

Family

ID=25356842

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60215175T Expired - Lifetime DE60215175T2 (de) 2001-05-31 2002-05-28 Parallele datenübertragung mit niedrigem stromverbrauch

Country Status (5)

Country Link
US (1) US6859883B2 (de)
EP (1) EP1407366B1 (de)
JP (1) JP2005520458A (de)
DE (1) DE60215175T2 (de)
WO (1) WO2003107194A2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002190532A (ja) * 2000-12-19 2002-07-05 Hitachi Ltd 半導体記憶装置
AU2002367333A1 (en) * 2002-01-08 2003-07-24 Koninklijke Philips Electronics N.V. High-pressure discharge lamp and method of manufacturing an electrode feedthrough for such a lamp
GB2402026B (en) * 2003-05-20 2005-07-13 Micron Technology Inc System and method for balancing capactively coupled signal lines
GB2405215B (en) * 2003-08-21 2005-09-28 Micron Technology Inc System and method for testing devices utilizing capacitively coupled signalling
GB2407207B (en) * 2003-10-13 2006-06-07 Micron Technology Inc Structure and method for forming a capacitively coupled chip-to-chip signalling interface
EP1770539A1 (de) * 2005-09-15 2007-04-04 Alcatel Lucent Verfahren zur Übertragung von Informationsworten über einen Bus, und Treiberschaltung und Leiterplatte dafür
CN101351966A (zh) * 2006-01-03 2009-01-21 Nxp股份有限公司 串行数据通信系统和方法
US8126402B1 (en) * 2006-12-05 2012-02-28 Nvidia Corporation Transmission line common-mode filter
DE102008034445B4 (de) * 2008-07-24 2010-03-11 Diehl Aerospace Gmbh Verfahren und Einrichtung zum Erfassen von Bus-Teilnehmern
EP2278714B1 (de) * 2009-07-02 2015-09-16 Nxp B.V. Leistungsstufe
US8787502B2 (en) 2012-04-24 2014-07-22 Nxp B.V. Capacitive isolated voltage domains
US8571093B1 (en) 2012-04-24 2013-10-29 Nxp B.V. Communication interface for galvanic isolation
US8818265B2 (en) 2012-04-24 2014-08-26 Nxp B.V. Interface for communication between voltage domains
US8867592B2 (en) 2012-05-09 2014-10-21 Nxp B.V. Capacitive isolated voltage domains
US9007141B2 (en) 2012-05-23 2015-04-14 Nxp B.V. Interface for communication between voltage domains
US8680690B1 (en) 2012-12-07 2014-03-25 Nxp B.V. Bond wire arrangement for efficient signal transmission
US9467060B2 (en) 2013-04-03 2016-10-11 Nxp B.V. Capacitive level shifter devices, methods and systems
US8896377B1 (en) 2013-05-29 2014-11-25 Nxp B.V. Apparatus for common mode suppression
US10396840B2 (en) 2013-12-27 2019-08-27 Intel Corporation High speed short reach input/output (I/O)
JP6398801B2 (ja) * 2015-03-09 2018-10-03 沖電気工業株式会社 メモリ装置へのデータ書き込み/読み出し制御方法及びメモリ装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4142081A1 (de) 1990-12-20 1992-07-23 Murata Manufacturing Co Abschlussschaltkreis zum abschluss einer datenbusleitung
US5208562A (en) 1991-10-07 1993-05-04 Isp Technologies, Inc. Bus terminator circuit having RC elements
US5239559A (en) * 1991-11-08 1993-08-24 Methode Electronics, Inc. Terminator method and apparatus
US5686872A (en) * 1995-03-13 1997-11-11 National Semiconductor Corporation Termination circuit for computer parallel data port
SE517770C2 (sv) * 1997-01-17 2002-07-16 Ericsson Telefon Ab L M Seriell-parallellomvandlare
JP3024583B2 (ja) * 1997-03-24 2000-03-21 日本電気株式会社 バス終端回路
JPH10289042A (ja) * 1997-04-11 1998-10-27 Toyo Electric Mfg Co Ltd 並列データバス終端回路
KR100292625B1 (ko) * 1998-06-29 2001-07-12 박종섭 고속인터페이스장치
US6211698B1 (en) 1999-06-29 2001-04-03 Hyundai Electronics Industries Co., Ltd. High speed interface apparatus

Also Published As

Publication number Publication date
JP2005520458A (ja) 2005-07-07
US20020184544A1 (en) 2002-12-05
EP1407366B1 (de) 2006-10-04
WO2003107194A2 (en) 2003-12-24
US6859883B2 (en) 2005-02-22
WO2003107194A3 (en) 2004-02-12
DE60215175T2 (de) 2007-08-23
EP1407366A2 (de) 2004-04-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL