DE602005019457D1 - System und verfahren für einen ausgeglichenen digital-analog-wandler mit zweifacher widerstandsfolge - Google Patents

System und verfahren für einen ausgeglichenen digital-analog-wandler mit zweifacher widerstandsfolge

Info

Publication number
DE602005019457D1
DE602005019457D1 DE602005019457T DE602005019457T DE602005019457D1 DE 602005019457 D1 DE602005019457 D1 DE 602005019457D1 DE 602005019457 T DE602005019457 T DE 602005019457T DE 602005019457 T DE602005019457 T DE 602005019457T DE 602005019457 D1 DE602005019457 D1 DE 602005019457D1
Authority
DE
Germany
Prior art keywords
resistor
string
analog converter
resistors
switching network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005019457T
Other languages
English (en)
Inventor
Xavier Haurie
Paul Ferguson Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MediaTek Inc
Original Assignee
MediaTek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MediaTek Inc filed Critical MediaTek Inc
Publication of DE602005019457D1 publication Critical patent/DE602005019457D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H03M1/682—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/76—Simultaneous conversion using switching tree
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/76—Simultaneous conversion using switching tree
    • H03M1/765—Simultaneous conversion using switching tree using a single level of switches which are controlled by unary decoded digital signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE602005019457T 2004-11-12 2005-11-10 System und verfahren für einen ausgeglichenen digital-analog-wandler mit zweifacher widerstandsfolge Active DE602005019457D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US62757704P 2004-11-12 2004-11-12
PCT/US2005/040818 WO2006053157A1 (en) 2004-11-12 2005-11-10 Balanced dual resistor string digital to analog converter system and method

Publications (1)

Publication Number Publication Date
DE602005019457D1 true DE602005019457D1 (de) 2010-04-01

Family

ID=35929706

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005019457T Active DE602005019457D1 (de) 2004-11-12 2005-11-10 System und verfahren für einen ausgeglichenen digital-analog-wandler mit zweifacher widerstandsfolge

Country Status (6)

Country Link
US (1) US7259706B2 (de)
EP (1) EP1813020B1 (de)
CN (1) CN101057407B (de)
AT (1) ATE458312T1 (de)
DE (1) DE602005019457D1 (de)
WO (1) WO2006053157A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7773019B2 (en) * 2008-08-26 2010-08-10 Atmel Corporation Digital-to-analog converter
JP2011129978A (ja) * 2009-12-15 2011-06-30 Renesas Electronics Corp Ｄ／ａコンバータ
US8514120B2 (en) 2011-11-08 2013-08-20 Texas Instruments Incorporated Digital-to-analog converter with a shared resistor string
US9124296B2 (en) * 2012-06-27 2015-09-01 Analog Devices Global Multi-stage string DAC
US8842034B1 (en) * 2013-02-06 2014-09-23 Xilinx, Inc. Resistor network implemented in an integrated circuit
US9124282B1 (en) * 2014-03-10 2015-09-01 Analog Devices Global Digital-to-analog converter with correction for parasitic routing resistance
US9941894B1 (en) * 2017-05-04 2018-04-10 Analog Devices Global Multiple string, multiple output digital to analog converter
US10075179B1 (en) * 2017-08-03 2018-09-11 Analog Devices Global Multiple string, multiple output digital to analog converter
US11671109B2 (en) * 2019-09-27 2023-06-06 Apple Inc. Constant current digital to analog converter systems and methods

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3997892A (en) 1973-07-27 1976-12-14 Trw Inc. Digital to analog converter with improved companding
US4338591A (en) 1981-06-09 1982-07-06 Analog Devices, Incorporated High resolution digital-to-analog converter
US5014054A (en) 1987-07-22 1991-05-07 Nippondenso Co., Ltd. Digital-to-analog converter of the resistor string type
JP3439515B2 (ja) * 1993-12-28 2003-08-25 富士通株式会社 ディジタル／アナログ変換器
US5495245A (en) 1994-04-26 1996-02-27 Analog Devices, Inc. Digital-to-analog converter with segmented resistor string
US5554986A (en) 1994-05-03 1996-09-10 Unitrode Corporation Digital to analog coverter having multiple resistor ladder stages
US5627537A (en) * 1994-11-21 1997-05-06 Analog Devices, Inc. Differential string DAC with improved integral non-linearity performance
US5696657A (en) 1995-06-02 1997-12-09 Hughes Electronics Temperature compensated APD detector bias and transimpedance amplifier circuitry for laser range finders
US5831566A (en) * 1996-05-07 1998-11-03 Vlsi Technology, Inc. Low voltage digital-to-analog converter
JP4299419B2 (ja) 1999-11-08 2009-07-22 富士通マイクロエレクトロニクス株式会社 デジタルアナログ変換回路
US6384763B1 (en) * 2000-05-31 2002-05-07 Cygnal Integrated Products, Inc. Segemented D/A converter with enhanced dynamic range
US6567026B1 (en) * 2000-06-22 2003-05-20 Analog Devices, Inc. Voltage scaling digital-to- analog converter with impedance strings
JP2002076897A (ja) 2000-08-29 2002-03-15 Toshiba Corp Ｄａコンバータ
GB0108656D0 (en) 2001-04-06 2001-05-30 Koninkl Philips Electronics Nv Digital to analogue converter
US6778122B2 (en) * 2002-12-23 2004-08-17 Institute Of Microelectronics Resistor string digital to analog converter with differential outputs and reduced switch count
US6937178B1 (en) * 2003-05-15 2005-08-30 Linear Technology Corporation Gradient insensitive split-core digital to analog converter

Also Published As

Publication number Publication date
CN101057407B (zh) 2011-08-10
US20060103564A1 (en) 2006-05-18
WO2006053157A1 (en) 2006-05-18
EP1813020B1 (de) 2010-02-17
EP1813020A1 (de) 2007-08-01
ATE458312T1 (de) 2010-03-15
US7259706B2 (en) 2007-08-21
CN101057407A (zh) 2007-10-17

Similar Documents

Publication Publication Date Title
DE602005019457D1 (de) System und verfahren für einen ausgeglichenen digital-analog-wandler mit zweifacher widerstandsfolge
CN103297056B (zh) D/a转换器
CN101399522B (zh) 多输入运算放大电路及使用其的数字/模拟转换器
CN104106269B (zh) 用于便携式设备的扬声器的电路
SG134209A1 (en) Improved flash adc
JP2002162484A (ja) 時間長をディジタル量に変換する装置
CN205178992U (zh) Fbdda放大器以及包括fbdda放大器的设备
JP2009152944A5 (de)
JP2009194558A (ja) カレントミラー回路及びデジタルアナログ変換回路
ATE514227T1 (de) Jitter-unempfindlicher sigma-delta modulator
CN104656732A (zh) 电压基准电路
CN106339024B (zh) 电压模式信号发射器
TW200642290A (en) Digital/analog converter using low-bit signal to control
CN103856217B (zh) 带有可调节的输出分辨率的数模转换器
Penchina Braess paradox: Maximum penalty in a minimal critical network
US20050053171A1 (en) Systems for data transmission
GB2241341A (en) Bridge balancing circuit
JP2014150319A (ja) Ｄ／ａ変換器
WO2008152908A1 (ja) 抵抗素子、ニューロン素子、及びニューラルネットワーク情報処理装置
CN102594332B (zh) 差分信号端接电路
KR20130051070A (ko) 다수 판정 회로
KR20190046571A (ko) R-2r 래더를 갖는 디지털-아날로그 변환기
CN108595361B (zh) 通过双sstl电路产生c_phy信号的装置
CN105720934B (zh) 运算放大器及其操作该运算放大器的方法
CN101908868B (zh) 一种输入和参考电压幅度为轨至轨的cmos比较器

Legal Events

Date Code Title Description
8364 No opposition during term of opposition