DE602005013772D1 - Dll-phasendetektion unter verwendung erweiterter phasenentzerrung - Google Patents
Dll-phasendetektion unter verwendung erweiterter phasenentzerrungInfo
- Publication number
- DE602005013772D1 DE602005013772D1 DE602005013772T DE602005013772T DE602005013772D1 DE 602005013772 D1 DE602005013772 D1 DE 602005013772D1 DE 602005013772 T DE602005013772 T DE 602005013772T DE 602005013772 T DE602005013772 T DE 602005013772T DE 602005013772 D1 DE602005013772 D1 DE 602005013772D1
- Authority
- DE
- Germany
- Prior art keywords
- phase
- descaling
- dll
- advanced
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/848,261 US7421606B2 (en) | 2004-05-18 | 2004-05-18 | DLL phase detection using advanced phase equalization |
| PCT/US2005/015717 WO2005117265A1 (en) | 2004-05-18 | 2005-05-04 | Dll phase detection using advanced phase equalisation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE602005013772D1 true DE602005013772D1 (de) | 2009-05-20 |
Family
ID=34968497
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE602005013772T Expired - Lifetime DE602005013772D1 (de) | 2004-05-18 | 2005-05-04 | Dll-phasendetektion unter verwendung erweiterter phasenentzerrung |
Country Status (7)
| Country | Link |
|---|---|
| US (3) | US7421606B2 (enExample) |
| EP (1) | EP1751868B1 (enExample) |
| JP (1) | JP4678541B2 (enExample) |
| KR (1) | KR101144519B1 (enExample) |
| DE (1) | DE602005013772D1 (enExample) |
| TW (1) | TWI345882B (enExample) |
| WO (1) | WO2005117265A1 (enExample) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4220320B2 (ja) * | 2003-07-10 | 2009-02-04 | 株式会社日立製作所 | 半導体集積回路装置 |
| US7421606B2 (en) * | 2004-05-18 | 2008-09-02 | Micron Technology, Inc. | DLL phase detection using advanced phase equalization |
| US8164368B2 (en) * | 2005-04-19 | 2012-04-24 | Micron Technology, Inc. | Power savings mode for memory systems |
| JP5153094B2 (ja) * | 2005-09-29 | 2013-02-27 | エスケーハイニックス株式会社 | Dll装置及びdllクロック生成方法 |
| KR100807111B1 (ko) * | 2005-09-29 | 2008-02-27 | 주식회사 하이닉스반도체 | 출력 제어장치 |
| US7227809B2 (en) * | 2005-10-14 | 2007-06-05 | Micron Technology, Inc. | Clock generator having a delay locked loop and duty cycle correction circuit in a parallel configuration |
| US7423465B2 (en) * | 2006-01-27 | 2008-09-09 | Micron Technology, Inc. | Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit |
| US8073890B2 (en) | 2006-02-22 | 2011-12-06 | Micron Technology, Inc. | Continuous high-frequency event filter |
| US7770049B1 (en) * | 2006-03-21 | 2010-08-03 | Advanced Micro Devices, Inc. | Controller for clock skew determination and reduction based on a lead count over multiple clock cycles |
| US7765425B1 (en) * | 2006-03-21 | 2010-07-27 | GlobalFoundries, Inc. | Incrementally adjustable skew and duty cycle correction for clock signals within a clock distribution network |
| KR100761401B1 (ko) * | 2006-09-28 | 2007-09-27 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그 구동 방법 |
| KR100919243B1 (ko) * | 2007-01-17 | 2009-09-30 | 삼성전자주식회사 | 주파수 대역에 적응적인 코오스 락 타임을 갖는 dll회로 및 이를 구비하는 반도체 메모리 장치 |
| KR100887238B1 (ko) * | 2007-08-10 | 2009-03-06 | 삼성전자주식회사 | 파이프라인 시스템의 동적 클럭 제어 장치 및 방법 |
| KR100930416B1 (ko) * | 2008-08-11 | 2009-12-08 | 주식회사 하이닉스반도체 | 반도체 집적 회로 및 그 제어 방법 |
| US8169242B2 (en) * | 2010-05-13 | 2012-05-01 | Ati Technologies Ulc | Programmable fine lock/unlock detection circuit |
| KR101143469B1 (ko) | 2010-07-02 | 2012-05-08 | 에스케이하이닉스 주식회사 | 반도체 메모리의 출력 인에이블 신호 생성 회로 |
| US8451969B2 (en) * | 2011-03-15 | 2013-05-28 | Intel Corporation | Apparatus, system, and method for timing recovery |
| US9106400B2 (en) * | 2012-10-23 | 2015-08-11 | Futurewei Technologies, Inc. | Hybrid timing recovery for burst mode receiver in passive optical networks |
| US9270284B1 (en) * | 2014-10-27 | 2016-02-23 | Aeroflex Colorado Springs Inc. | Method for creating a reliable phase-locked loop in a ruggedized or harsh environment |
| US9577648B2 (en) | 2014-12-31 | 2017-02-21 | Semtech Corporation | Semiconductor device and method for accurate clock domain synchronization over a wide frequency range |
| US10218360B2 (en) * | 2016-08-02 | 2019-02-26 | Altera Corporation | Dynamic clock-data phase alignment in a source synchronous interface circuit |
| US10056909B1 (en) | 2017-05-01 | 2018-08-21 | Everspin Technologies, Inc. | Single-lock delay locked loop with cycle counter and method therefore |
| US10581417B2 (en) * | 2017-09-29 | 2020-03-03 | International Business Machines Corporation | Skew sensor with enhanced reliability |
| KR102502236B1 (ko) | 2017-11-20 | 2023-02-21 | 삼성전자주식회사 | 클락 데이터 복구 회로, 이를 포함하는 장치 및 클락 데이터 복구 방법 |
| CN108566197B (zh) * | 2018-03-20 | 2022-03-04 | 上海集成电路研发中心有限公司 | 一种双反馈的延迟锁相环 |
| CN110350913A (zh) * | 2019-06-25 | 2019-10-18 | 电子科技大学 | 一种基于锁相延迟的多adc同步装置 |
| KR102662555B1 (ko) * | 2019-07-05 | 2024-05-03 | 삼성전자주식회사 | 지연 동기 루프 회로 및 이를 구비하는 반도체 메모리 장치 |
| US10999051B2 (en) * | 2019-09-18 | 2021-05-04 | Nvidia Corp. | Reference noise compensation for single-ended signaling |
Family Cites Families (66)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57203213A (en) * | 1981-06-08 | 1982-12-13 | Trio Kenwood Corp | Clock signal reproducing circuit |
| US5118975A (en) | 1990-03-05 | 1992-06-02 | Thinking Machines Corporation | Digital clock buffer circuit providing controllable delay |
| US5272729A (en) | 1991-09-20 | 1993-12-21 | International Business Machines Corporation | Clock signal latency elimination network |
| US5295164A (en) * | 1991-12-23 | 1994-03-15 | Apple Computer, Inc. | Apparatus for providing a system clock locked to an external clock over a wide range of frequencies |
| US5317202A (en) | 1992-05-28 | 1994-05-31 | Intel Corporation | Delay line loop for 1X on-chip clock generation with zero skew and 50% duty cycle |
| US5815016A (en) | 1994-09-02 | 1998-09-29 | Xilinx, Inc. | Phase-locked delay loop for clock correction |
| US5537068A (en) * | 1994-09-06 | 1996-07-16 | Intel Corporation | Differential delay line clock generator |
| US5537069A (en) * | 1995-03-30 | 1996-07-16 | Intel Corporation | Apparatus and method for selecting a tap range in a digital delay line |
| JP3710845B2 (ja) | 1995-06-21 | 2005-10-26 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US5790612A (en) | 1996-02-29 | 1998-08-04 | Silicon Graphics, Inc. | System and method to reduce jitter in digital delay-locked loops |
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| CA2204089C (en) * | 1997-04-30 | 2001-08-07 | Mosaid Technologies Incorporated | Digital delay locked loop |
| JP3429977B2 (ja) | 1997-05-16 | 2003-07-28 | 富士通株式会社 | スキュー低減回路及び半導体装置 |
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| US6173432B1 (en) | 1997-06-20 | 2001-01-09 | Micron Technology, Inc. | Method and apparatus for generating a sequence of clock signals |
| US5889336A (en) | 1997-09-05 | 1999-03-30 | Tateishi; Kazuo | Power generating installation |
| JP3938617B2 (ja) | 1997-09-09 | 2007-06-27 | 富士通株式会社 | 半導体装置及び半導体システム |
| US6101197A (en) * | 1997-09-18 | 2000-08-08 | Micron Technology, Inc. | Method and apparatus for adjusting the timing of signals over fine and coarse ranges |
| KR100269316B1 (ko) * | 1997-12-02 | 2000-10-16 | 윤종용 | 동기지연회로가결합된지연동기루프(dll)및위상동기루프(pll) |
| JP3789629B2 (ja) * | 1998-01-27 | 2006-06-28 | 富士通株式会社 | 半導体装置 |
| KR100280447B1 (ko) * | 1998-03-02 | 2001-02-01 | 김영환 | 디지털지연동기루프회로 |
| US6088255A (en) | 1998-03-20 | 2000-07-11 | Fujitsu Limited | Semiconductor device with prompt timing stabilization |
| JPH11353878A (ja) | 1998-04-07 | 1999-12-24 | Fujitsu Ltd | 半導体装置 |
| US6069506A (en) * | 1998-05-20 | 2000-05-30 | Micron Technology, Inc. | Method and apparatus for improving the performance of digital delay locked loop circuits |
| US6327318B1 (en) * | 1998-06-30 | 2001-12-04 | Mosaid Technologies Incorporated | Process, voltage, temperature independent switched delay compensation scheme |
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-
2004
- 2004-05-18 US US10/848,261 patent/US7421606B2/en not_active Expired - Lifetime
-
2005
- 2005-05-03 TW TW094114223A patent/TWI345882B/zh not_active IP Right Cessation
- 2005-05-04 DE DE602005013772T patent/DE602005013772D1/de not_active Expired - Lifetime
- 2005-05-04 WO PCT/US2005/015717 patent/WO2005117265A1/en not_active Ceased
- 2005-05-04 JP JP2007527274A patent/JP4678541B2/ja not_active Expired - Lifetime
- 2005-05-04 EP EP05744245A patent/EP1751868B1/en not_active Expired - Lifetime
- 2005-05-04 KR KR1020067023220A patent/KR101144519B1/ko not_active Expired - Lifetime
-
2008
- 2008-08-15 US US12/228,771 patent/US8271823B2/en not_active Expired - Lifetime
-
2012
- 2012-09-10 US US13/609,025 patent/US8595537B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP1751868A1 (en) | 2007-02-14 |
| US20130021073A1 (en) | 2013-01-24 |
| TW200612667A (en) | 2006-04-16 |
| US8595537B2 (en) | 2013-11-26 |
| US8271823B2 (en) | 2012-09-18 |
| KR20070026498A (ko) | 2007-03-08 |
| US20080320325A1 (en) | 2008-12-25 |
| JP2007538468A (ja) | 2007-12-27 |
| US7421606B2 (en) | 2008-09-02 |
| EP1751868B1 (en) | 2009-04-08 |
| US20050262373A1 (en) | 2005-11-24 |
| JP4678541B2 (ja) | 2011-04-27 |
| TWI345882B (en) | 2011-07-21 |
| WO2005117265A1 (en) | 2005-12-08 |
| KR101144519B1 (ko) | 2012-05-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |