DE602004000109T2 - Mehrlagige Leiterplatte mit an den Kontaktlöchern verringerten Verlusten - Google Patents
Mehrlagige Leiterplatte mit an den Kontaktlöchern verringerten Verlusten Download PDFInfo
- Publication number
- DE602004000109T2 DE602004000109T2 DE602004000109T DE602004000109T DE602004000109T2 DE 602004000109 T2 DE602004000109 T2 DE 602004000109T2 DE 602004000109 T DE602004000109 T DE 602004000109T DE 602004000109 T DE602004000109 T DE 602004000109T DE 602004000109 T2 DE602004000109 T2 DE 602004000109T2
- Authority
- DE
- Germany
- Prior art keywords
- circuit board
- printed circuit
- contact holes
- transmission line
- layer printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005540 biological transmission Effects 0.000 abstract 4
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
Classifications
-
- E—FIXED CONSTRUCTIONS
- E04—BUILDING
- E04G—SCAFFOLDING; FORMS; SHUTTERING; BUILDING IMPLEMENTS OR AIDS, OR THEIR USE; HANDLING BUILDING MATERIALS ON THE SITE; REPAIRING, BREAKING-UP OR OTHER WORK ON EXISTING BUILDINGS
- E04G13/00—Falsework, forms, or shutterings for particular parts of buildings, e.g. stairs, steps, cornices, balconies foundations, sills
- E04G13/02—Falsework, forms, or shutterings for particular parts of buildings, e.g. stairs, steps, cornices, balconies foundations, sills for columns or like pillars; Special tying or clamping means therefor
- E04G13/023—Falsework, forms, or shutterings for particular parts of buildings, e.g. stairs, steps, cornices, balconies foundations, sills for columns or like pillars; Special tying or clamping means therefor with means for modifying the sectional dimensions
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0248—Skew reduction or using delay lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09254—Branched layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09263—Meander
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Architecture (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Mechanical Engineering (AREA)
- Civil Engineering (AREA)
- Structural Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/395,956 US7013452B2 (en) | 2003-03-24 | 2003-03-24 | Method and apparatus for intra-layer transitions and connector launch in multilayer circuit boards |
Publications (2)
Publication Number | Publication Date |
---|---|
DE602004000109D1 DE602004000109D1 (de) | 2005-11-10 |
DE602004000109T2 true DE602004000109T2 (de) | 2006-06-14 |
Family
ID=32824948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004000109T Expired - Lifetime DE602004000109T2 (de) | 2003-03-24 | 2004-02-20 | Mehrlagige Leiterplatte mit an den Kontaktlöchern verringerten Verlusten |
Country Status (7)
Country | Link |
---|---|
US (1) | US7013452B2 (de) |
EP (1) | EP1463387B1 (de) |
JP (1) | JP2004289164A (de) |
KR (1) | KR20040084780A (de) |
CN (1) | CN1592549A (de) |
AT (1) | ATE306186T1 (de) |
DE (1) | DE602004000109T2 (de) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7055119B2 (en) * | 2003-07-31 | 2006-05-30 | International Business Machines Corporation | Customized mesh plane, method and computer program product for creating customized mesh planes within electronic packages |
JP4354489B2 (ja) * | 2004-02-13 | 2009-10-28 | モレックス インコーポレイテド | 回路基板及び高速ビアシステム |
WO2006025354A1 (ja) * | 2004-09-01 | 2006-03-09 | Matsushita Electric Industrial Co., Ltd. | ヒートポンプ |
US7501586B2 (en) * | 2004-10-29 | 2009-03-10 | Intel Corporation | Apparatus and method for improving printed circuit board signal layer transitions |
CN1916915A (zh) * | 2005-08-19 | 2007-02-21 | 鸿富锦精密工业(深圳)有限公司 | 改良过孔阻抗的方法 |
US20070211443A1 (en) * | 2006-03-09 | 2007-09-13 | Rockwell Automation Technologies, Inc. | System and method for postponing application of customizing components in a final drive |
US20080005896A1 (en) * | 2006-07-05 | 2008-01-10 | Teamchem Company | Method for fabricating multi-layered flexible printed circuit board without via holes |
US20080017305A1 (en) * | 2006-07-21 | 2008-01-24 | Teamchem Company | Method for fabricating multi-layered printed circuit board without via holes |
US7667980B2 (en) * | 2006-10-10 | 2010-02-23 | International Business Machines Corporation | Printed circuit boards for countering signal distortion |
US20090159326A1 (en) * | 2007-12-19 | 2009-06-25 | Richard Mellitz | S-turn via and method for reducing signal loss in double-sided printed wiring boards |
JP2009158815A (ja) * | 2007-12-27 | 2009-07-16 | Fujitsu Ltd | 多層配線基板の製造方法および多層配線基板構造 |
US7949979B1 (en) * | 2008-08-13 | 2011-05-24 | Xilinx, Inc. | Predicting induced crosstalk for the pins of a programmable logic device |
EP2420115B1 (de) * | 2009-04-13 | 2015-04-08 | Hewlett-Packard Development Company, L.P. | Rückbohrungsverifikationsmerkmal |
US8143976B2 (en) * | 2009-10-27 | 2012-03-27 | Xilinx, Inc. | High impedance electrical connection via |
US8412497B1 (en) * | 2010-09-07 | 2013-04-02 | Xilinx, Inc. | Predicting simultaneous switching output noise of an integrated circuit |
JP6176917B2 (ja) * | 2012-11-20 | 2017-08-09 | キヤノン株式会社 | プリント配線板、プリント回路板及び電子機器 |
US9860985B1 (en) * | 2012-12-17 | 2018-01-02 | Lockheed Martin Corporation | System and method for improving isolation in high-density laminated printed circuit boards |
US10103054B2 (en) * | 2013-03-13 | 2018-10-16 | Intel Corporation | Coupled vias for channel cross-talk reduction |
US9504159B2 (en) * | 2014-01-31 | 2016-11-22 | Intel Corporation | Circuit component bridge device |
WO2017079626A1 (en) | 2015-11-06 | 2017-05-11 | Fci Americas Technology Llc | Electrical connector including heat dissipation holes |
US20200303799A1 (en) * | 2017-10-17 | 2020-09-24 | Commscope Technologies Llc | Vertical transitions for microwave and millimeter wave communications systems having multi-layer substrates |
US11564316B2 (en) * | 2018-11-29 | 2023-01-24 | Lockheed Martin Corporation | Apparatus and method for impedance balancing of long radio frequency (RF) via |
US11604261B2 (en) | 2019-02-06 | 2023-03-14 | Lockeed Martin Corporation | Extended laser active ranging system, method and computer readable program product |
US11916325B1 (en) | 2021-07-09 | 2024-02-27 | Innovium, Inc. | Circuit board devices with reconfigurable connections |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5438297A (en) * | 1992-12-30 | 1995-08-01 | Intel Corporation | Electrical trace having a closed loop configuration |
JPH09139611A (ja) | 1995-11-15 | 1997-05-27 | Alps Electric Co Ltd | マイクロストリップ線路共振素子 |
US5646368A (en) * | 1995-11-30 | 1997-07-08 | International Business Machines Corporation | Printed circuit board with an integrated twisted pair conductor |
US6388208B1 (en) * | 1999-06-11 | 2002-05-14 | Teradyne, Inc. | Multi-connection via with electrically isolated segments |
US6542048B1 (en) * | 2000-04-13 | 2003-04-01 | Raytheon Company | Suspended transmission line with embedded signal channeling device |
US6622370B1 (en) * | 2000-04-13 | 2003-09-23 | Raytheon Company | Method for fabricating suspended transmission line |
JP4098459B2 (ja) * | 2000-05-23 | 2008-06-11 | 株式会社日立製作所 | 電気長を考慮した信号線路の配線方法 |
JP3903701B2 (ja) * | 2000-08-17 | 2007-04-11 | 松下電器産業株式会社 | 多層回路基板とその製造方法 |
-
2003
- 2003-03-24 US US10/395,956 patent/US7013452B2/en not_active Expired - Fee Related
-
2004
- 2004-02-20 DE DE602004000109T patent/DE602004000109T2/de not_active Expired - Lifetime
- 2004-02-20 EP EP04250909A patent/EP1463387B1/de not_active Expired - Lifetime
- 2004-02-20 AT AT04250909T patent/ATE306186T1/de not_active IP Right Cessation
- 2004-03-23 CN CNA2004100302671A patent/CN1592549A/zh active Pending
- 2004-03-24 JP JP2004086725A patent/JP2004289164A/ja active Pending
- 2004-03-24 KR KR1020040020035A patent/KR20040084780A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
DE602004000109D1 (de) | 2005-11-10 |
US7013452B2 (en) | 2006-03-14 |
CN1592549A (zh) | 2005-03-09 |
EP1463387B1 (de) | 2005-10-05 |
US20040188138A1 (en) | 2004-09-30 |
KR20040084780A (ko) | 2004-10-06 |
EP1463387A1 (de) | 2004-09-29 |
ATE306186T1 (de) | 2005-10-15 |
JP2004289164A (ja) | 2004-10-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |