DE60117114D1 - CMOS Speicher (vom Mehrtoregistertyp) mit leistungsreduziertem Spaltenmultiplexierungsschema - Google Patents
CMOS Speicher (vom Mehrtoregistertyp) mit leistungsreduziertem SpaltenmultiplexierungsschemaInfo
- Publication number
- DE60117114D1 DE60117114D1 DE60117114T DE60117114T DE60117114D1 DE 60117114 D1 DE60117114 D1 DE 60117114D1 DE 60117114 T DE60117114 T DE 60117114T DE 60117114 T DE60117114 T DE 60117114T DE 60117114 D1 DE60117114 D1 DE 60117114D1
- Authority
- DE
- Germany
- Prior art keywords
- coupled
- storage elements
- sensing device
- read port
- columns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US964971 | 1992-10-22 | ||
US24591300P | 2000-11-03 | 2000-11-03 | |
US245913P | 2000-11-03 | ||
US09/964,971 US6519204B2 (en) | 2000-11-03 | 2001-09-27 | Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60117114D1 true DE60117114D1 (de) | 2006-04-20 |
DE60117114T2 DE60117114T2 (de) | 2006-09-28 |
Family
ID=26937555
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60117114T Expired - Lifetime DE60117114T2 (de) | 2000-11-03 | 2001-11-05 | CMOS Speicher(vom Mehrtorregistertyp) mit leistungsreduziertem Spaltenmultiplexierungsschema |
Country Status (4)
Country | Link |
---|---|
US (2) | US6519204B2 (de) |
EP (1) | EP1204121B1 (de) |
AT (1) | ATE317586T1 (de) |
DE (1) | DE60117114T2 (de) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6639866B2 (en) * | 2000-11-03 | 2003-10-28 | Broadcom Corporation | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |
US6946901B2 (en) * | 2001-05-22 | 2005-09-20 | The Regents Of The University Of California | Low-power high-performance integrated circuit and related methods |
WO2003083872A2 (en) * | 2002-03-27 | 2003-10-09 | The Regents Of The University Of California | Low-power high-performance memory cell and related methods |
JP4537668B2 (ja) * | 2003-05-23 | 2010-09-01 | パナソニック株式会社 | 多ポートメモリセル |
EP1642299A4 (de) * | 2003-07-01 | 2007-03-14 | Zmos Technology Inc | Sram-zellenstruktur und -schaltungen |
JP4904154B2 (ja) * | 2003-07-14 | 2012-03-28 | フルクラム・マイクロシステムズ・インコーポレーテッド | 非同期スタティックランダムアクセスメモリ |
EP1526590A2 (de) * | 2003-09-22 | 2005-04-27 | Fuji Photo Film Co., Ltd. | Batterie und ein Paar Kontakte und Objektiv-gepasstes Fotofilmeinheit |
US6987686B2 (en) * | 2003-12-11 | 2006-01-17 | International Business Machines Corporation | Performance increase technique for use in a register file having dynamically boosted wordlines |
FR2871922A1 (fr) * | 2004-06-17 | 2005-12-23 | St Microelectronics Sa | Cellule de memoire vive a encombrement et complexite reduits |
US7469465B2 (en) * | 2004-06-30 | 2008-12-30 | Hitachi Global Storage Technologies Netherlands B.V. | Method of providing a low-stress sensor configuration for a lithography-defined read sensor |
US7209395B2 (en) * | 2004-09-28 | 2007-04-24 | Intel Corporation | Low leakage and leakage tolerant stack free multi-ported register file |
US7660149B2 (en) * | 2006-12-07 | 2010-02-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | SRAM cell with separate read and write ports |
US7746713B2 (en) * | 2007-09-12 | 2010-06-29 | Massachusetts Institute Of Technology | High density 45 nm SRAM using small-signal non-strobed regenerative sensing |
US8370557B2 (en) * | 2008-12-19 | 2013-02-05 | Intel Corporation | Pseudo dual-port SRAM and a shared memory switch using multiple memory banks and a sideband memory |
TWI419173B (zh) * | 2009-07-31 | 2013-12-11 | Univ Nat Chiao Tung | Static random access memory device |
US8456945B2 (en) | 2010-04-23 | 2013-06-04 | Advanced Micro Devices, Inc. | 10T SRAM for graphics processing |
CN103890856B (zh) | 2011-10-27 | 2017-07-11 | 慧与发展有限责任合伙企业 | 支持内存储数据结构的可移位存储器 |
US8854902B2 (en) * | 2012-05-18 | 2014-10-07 | Stmicroelectronics International N.V. | Write self timing circuitry for self-timed memory |
US8854901B2 (en) | 2012-05-18 | 2014-10-07 | Stmicroelectronics International N.V. | Read self timing circuitry for self-timed memory |
CN102751975B (zh) * | 2012-07-12 | 2016-01-20 | 三一重工股份有限公司 | Pwm与ai复用端口及控制器 |
US9324414B2 (en) | 2013-07-24 | 2016-04-26 | Stmicroelectronics International N.V. | Selective dual cycle write operation for a self-timed memory |
CN104199344B (zh) * | 2014-08-14 | 2017-08-18 | 湖南三一智能控制设备有限公司 | 接口电路、控制器、控制系统及工程机械 |
US10446233B2 (en) | 2017-08-23 | 2019-10-15 | Globalfoundries Inc. | Sense-line muxing scheme |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0218747B1 (de) * | 1985-10-15 | 1991-05-08 | International Business Machines Corporation | Leseverstärker zur Verstärkung von Signalen auf einer vorgespannten Leitung |
US4935649A (en) * | 1988-07-11 | 1990-06-19 | Cypress Semiconductor Corporation | Clamped sense amplifier |
US4918341A (en) * | 1988-09-23 | 1990-04-17 | Actel Corporaton | High speed static single-ended sense amplifier |
JP2837682B2 (ja) * | 1989-01-13 | 1998-12-16 | 株式会社日立製作所 | 半導体記憶装置 |
US4943945A (en) * | 1989-06-13 | 1990-07-24 | International Business Machines Corporation | Reference voltage generator for precharging bit lines of a transistor memory |
US5189640A (en) * | 1990-03-27 | 1993-02-23 | National Semiconductor Corporation | High speed, multi-port memory cell utilizable in a BICMOS memory array |
US5325335A (en) * | 1991-05-30 | 1994-06-28 | Integrated Device Technology, Inc. | Memories and amplifiers suitable for low voltage power supplies |
US5440506A (en) * | 1992-08-14 | 1995-08-08 | Harris Corporation | Semiconductor ROM device and method |
GB2278698B (en) * | 1993-05-05 | 1997-09-03 | Hewlett Packard Co | Multi-ported data storage device with improved cell stability |
US5477489A (en) * | 1995-03-20 | 1995-12-19 | Exponential Technology, Inc. | High-stability CMOS multi-port register file memory cell with column isolation and current-mirror row line driver |
US5710742A (en) * | 1995-05-12 | 1998-01-20 | International Business Machines Corporation | High density two port SRAM cell for low voltage CMOS applications |
US5724299A (en) * | 1996-04-30 | 1998-03-03 | Sun Microsystems, Inc. | Multiport register file memory using small voltage swing for write operation |
-
2001
- 2001-09-27 US US09/964,971 patent/US6519204B2/en not_active Expired - Lifetime
- 2001-11-05 EP EP01309366A patent/EP1204121B1/de not_active Expired - Lifetime
- 2001-11-05 DE DE60117114T patent/DE60117114T2/de not_active Expired - Lifetime
- 2001-11-05 AT AT01309366T patent/ATE317586T1/de not_active IP Right Cessation
-
2003
- 2003-01-10 US US10/340,066 patent/US6903996B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1204121A2 (de) | 2002-05-08 |
DE60117114T2 (de) | 2006-09-28 |
US20030099148A1 (en) | 2003-05-29 |
EP1204121A3 (de) | 2002-10-16 |
ATE317586T1 (de) | 2006-02-15 |
US6903996B2 (en) | 2005-06-07 |
US6519204B2 (en) | 2003-02-11 |
US20020071333A1 (en) | 2002-06-13 |
EP1204121B1 (de) | 2006-02-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE60117114D1 (de) | CMOS Speicher (vom Mehrtoregistertyp) mit leistungsreduziertem Spaltenmultiplexierungsschema | |
KR970029841A (ko) | 감소 칩 영역을 가진 반도체 메모리 소자 | |
WO2002043072A3 (en) | Very small swing and low voltage cmos static memory | |
JP2004526268A5 (de) | ||
US7414908B2 (en) | Magnetic memory device | |
JP2001291389A5 (de) | ||
KR970067365A (ko) | 반도체 기억장치 | |
KR920001542A (ko) | 감지 증폭기를 갖는 반도체 메모리 | |
US20200105315A1 (en) | Voltage-enhanced-feedback sense amplifier of resistive memory and operating method thereof | |
KR880003250A (ko) | 리드온리 메모리 장치(Read Only Memory Device) | |
KR860003604A (ko) | 반도체 메모리 장치 | |
KR950010306B1 (ko) | 반도체 기억장치 | |
JP5135609B2 (ja) | 半導体装置 | |
JP2003223788A5 (de) | ||
KR880008340A (ko) | Cmos 게이트 어레이의 고밀도 rom | |
JP4954954B2 (ja) | 半導体記憶装置 | |
US7433259B2 (en) | Semiconductor memory device having layered bit line structure | |
KR950006854A (ko) | 반도체 기억장치 및 그 구동방법 | |
JPH0778489A (ja) | 記憶装置 | |
KR930005199A (ko) | 반도체 기억장치 | |
KR900006977A (ko) | 반도체기억장치 | |
KR880014569A (ko) | 반도체 기억장치 | |
KR970071795A (ko) | 싱글 데이타라인을 갖는 반도체 메모리 장치 | |
KR860002156A (ko) | 반도체 장치 | |
US11049550B1 (en) | Multi-bit current sense amplifier with pipeline current sampling of resistive memory array structure and sensing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M |