DE60030767D1 - Datenzuweisung zu threads in einem multi-threaded netzwerkprozessor - Google Patents

Datenzuweisung zu threads in einem multi-threaded netzwerkprozessor

Info

Publication number
DE60030767D1
DE60030767D1 DE60030767T DE60030767T DE60030767D1 DE 60030767 D1 DE60030767 D1 DE 60030767D1 DE 60030767 T DE60030767 T DE 60030767T DE 60030767 T DE60030767 T DE 60030767T DE 60030767 D1 DE60030767 D1 DE 60030767D1
Authority
DE
Germany
Prior art keywords
memory
references
processor
threads
network processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60030767T
Other languages
English (en)
Other versions
DE60030767T2 (de
Inventor
Gilbert Wolrich
Donald Hooper
Debra Bernstein
J Adiletta
William Wheeler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE60030767D1 publication Critical patent/DE60030767D1/de
Publication of DE60030767T2 publication Critical patent/DE60030767T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Communication Control (AREA)
  • Bus Control (AREA)
DE60030767T 1999-12-28 2000-12-08 Datenzuweisung zu threads in einem multi-threaded netzwerkprozessor Expired - Lifetime DE60030767T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/473,799 US6625654B1 (en) 1999-12-28 1999-12-28 Thread signaling in multi-threaded network processor
US473799 1999-12-28
PCT/US2000/042716 WO2001048606A2 (en) 1999-12-28 2000-12-08 Allocation of data to threads in multi-threaded network processor

Publications (2)

Publication Number Publication Date
DE60030767D1 true DE60030767D1 (de) 2006-10-26
DE60030767T2 DE60030767T2 (de) 2007-11-08

Family

ID=23881024

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60030767T Expired - Lifetime DE60030767T2 (de) 1999-12-28 2000-12-08 Datenzuweisung zu threads in einem multi-threaded netzwerkprozessor

Country Status (10)

Country Link
US (3) US6625654B1 (de)
EP (1) EP1242883B1 (de)
CN (1) CN100351798C (de)
AT (1) ATE339724T1 (de)
AU (1) AU4311601A (de)
DE (1) DE60030767T2 (de)
HK (1) HK1046050A1 (de)
SG (1) SG145543A1 (de)
TW (1) TW544629B (de)
WO (1) WO2001048606A2 (de)

Families Citing this family (213)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2728559B1 (fr) * 1994-12-23 1997-01-31 Saint Gobain Vitrage Substrats en verre revetus d'un empilement de couches minces a proprietes de reflexion dans l'infrarouge et/ou dans le domaine du rayonnement solaire
US7266725B2 (en) * 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
DE19651075A1 (de) * 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) * 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
DE59710317D1 (de) * 1996-12-27 2003-07-24 Pact Inf Tech Gmbh VERFAHREN ZUM SELBSTÄNDIGEN DYNAMISCHEN UMLADEN VON DATENFLUSSPROZESSOREN (DFPs) SOWIE BAUSTEINEN MIT ZWEI- ODER MEHRDIMENSIONALEN PROGRAMMIERBAREN ZELLSTRUKTUREN (FPGAs, DPGAs, o.dgl.)
DE19654846A1 (de) * 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
US6912637B1 (en) * 1998-07-08 2005-06-28 Broadcom Corporation Apparatus and method for managing memory in a network switch
US20030095967A1 (en) * 1999-01-25 2003-05-22 Mackay Fabienne BAFF, inhibitors thereof and their use in the modulation of B-cell response and treatment of autoimmune disorders
DE10081643D2 (de) 1999-06-10 2002-05-29 Pact Inf Tech Gmbh Sequenz-Partitionierung auf Zellstrukturen
US7017020B2 (en) * 1999-07-16 2006-03-21 Broadcom Corporation Apparatus and method for optimizing access to memory
US6983350B1 (en) 1999-08-31 2006-01-03 Intel Corporation SDRAM controller for parallel processor architecture
US7546444B1 (en) 1999-09-01 2009-06-09 Intel Corporation Register set used in multithreaded parallel processor architecture
US6532509B1 (en) 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6631430B1 (en) * 1999-12-28 2003-10-07 Intel Corporation Optimizations to receive packet status from fifo bus
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
US6661794B1 (en) 1999-12-29 2003-12-09 Intel Corporation Method and apparatus for gigabit packet assignment for multithreaded packet processing
US6952824B1 (en) * 1999-12-30 2005-10-04 Intel Corporation Multi-threaded sequenced receive for fast network port stream of packets
US7480706B1 (en) * 1999-12-30 2009-01-20 Intel Corporation Multi-threaded round-robin receive for fast network port
JP2004506261A (ja) * 2000-06-13 2004-02-26 ペーアーツェーテー　イクスペーペー　テクノロジーズ　アクチエンゲゼルシャフト パイプラインｃｔプロトコルおよびｃｔ通信
US7681018B2 (en) 2000-08-31 2010-03-16 Intel Corporation Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
JP2004517386A (ja) * 2000-10-06 2004-06-10 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト 方法および装置
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US7051330B1 (en) * 2000-11-21 2006-05-23 Microsoft Corporation Generic application server and method of operation therefor
US7131125B2 (en) * 2000-12-22 2006-10-31 Nortel Networks Limited Method and system for sharing a computer resource between instruction threads of a multi-threaded process
US20090210653A1 (en) * 2001-03-05 2009-08-20 Pact Xpp Technologies Ag Method and device for treating and processing data
US7581076B2 (en) * 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US9037807B2 (en) * 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7844796B2 (en) * 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US20090300262A1 (en) * 2001-03-05 2009-12-03 Martin Vorbach Methods and devices for treating and/or processing data
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US20070299993A1 (en) * 2001-03-05 2007-12-27 Pact Xpp Technologies Ag Method and Device for Treating and Processing Data
US7657877B2 (en) * 2001-06-20 2010-02-02 Pact Xpp Technologies Ag Method for processing data
US7996827B2 (en) * 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7216204B2 (en) * 2001-08-27 2007-05-08 Intel Corporation Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
US6868476B2 (en) * 2001-08-27 2005-03-15 Intel Corporation Software controlled content addressable memory in a general purpose execution datapath
US7225281B2 (en) * 2001-08-27 2007-05-29 Intel Corporation Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms
US7434191B2 (en) * 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
JP2003099272A (ja) * 2001-09-20 2003-04-04 Ricoh Co Ltd タスク切替システムと方法およびｄｓｐとモデム
EP1868111A1 (de) * 2001-09-28 2007-12-19 ConSentry Networks, Inc. Multi-threaded Paketverarbeitungsmaschine für zustandsbehaftete Paketverarbeitung
US7126952B2 (en) * 2001-09-28 2006-10-24 Intel Corporation Multiprotocol decapsulation/encapsulation control structure and packet protocol conversion method
US7360217B2 (en) * 2001-09-28 2008-04-15 Consentry Networks, Inc. Multi-threaded packet processing engine for stateful packet processing
US6904040B2 (en) * 2001-10-05 2005-06-07 International Business Machines Corporaiton Packet preprocessing interface for multiprocessor network handler
US7577822B2 (en) * 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
US7107413B2 (en) * 2001-12-17 2006-09-12 Intel Corporation Write queue descriptor count instruction for high speed queuing
US7895239B2 (en) 2002-01-04 2011-02-22 Intel Corporation Queue arrays in network devices
US7180887B1 (en) * 2002-01-04 2007-02-20 Radisys Patent Properties Routing and forwarding table management for network processor architectures
US6934951B2 (en) * 2002-01-17 2005-08-23 Intel Corporation Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section
WO2003071418A2 (de) * 2002-01-18 2003-08-28 Pact Xpp Technologies Ag Übersetzungsverfahren
WO2003060747A2 (de) * 2002-01-19 2003-07-24 Pact Xpp Technologies Ag Reconfigurierbarer prozessor
US7181594B2 (en) * 2002-01-25 2007-02-20 Intel Corporation Context pipelines
US7610451B2 (en) * 2002-01-25 2009-10-27 Intel Corporation Data transfer mechanism using unidirectional pull bus and push bus
EP2043000B1 (de) 2002-02-18 2011-12-21 Richter, Thomas Bussysteme und Rekonfigurationsverfahren
MXPA04008502A (es) * 2002-03-05 2004-12-06 Ibm Metodos para buscar previamente, datos/instrucciones relacionados con eventos activados externamente.
US20060075211A1 (en) * 2002-03-21 2006-04-06 Martin Vorbach Method and device for data processing
US8914590B2 (en) * 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
GB0209670D0 (en) * 2002-04-26 2002-06-05 Easics Nv Efficient packet processing pipelining device and method
US7376950B2 (en) 2002-05-08 2008-05-20 Intel Corporation Signal aggregation
US7269752B2 (en) * 2002-06-04 2007-09-11 Lucent Technologies Inc. Dynamically controlling power consumption within a network node
US20030231627A1 (en) * 2002-06-04 2003-12-18 Rajesh John Arbitration logic for assigning input packet to available thread of a multi-threaded multi-engine network processor
US20030233485A1 (en) * 2002-06-13 2003-12-18 Mircrosoft Corporation Event queue
JP2004062446A (ja) * 2002-07-26 2004-02-26 Ibm Japan Ltd 情報収集システム、アプリケーションサーバ、情報収集方法、およびプログラム
US20110238948A1 (en) * 2002-08-07 2011-09-29 Martin Vorbach Method and device for coupling a data processing unit and a data processing array
US7124196B2 (en) * 2002-08-07 2006-10-17 Intel Corporation Processing a network packet using queues
US7657861B2 (en) * 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
AU2003286131A1 (en) * 2002-08-07 2004-03-19 Pact Xpp Technologies Ag Method and device for processing data
US7577816B2 (en) * 2003-08-18 2009-08-18 Cray Inc. Remote translation mechanism for a multinode system
US7394284B2 (en) * 2002-09-06 2008-07-01 Pact Xpp Technologies Ag Reconfigurable sequencer structure
US8478811B2 (en) * 2002-10-08 2013-07-02 Netlogic Microsystems, Inc. Advanced processor with credit based scheme for optimal packet flow in a multi-processor system on a chip
US8176298B2 (en) * 2002-10-08 2012-05-08 Netlogic Microsystems, Inc. Multi-core multi-threaded processing systems with instruction reordering in an in-order pipeline
US8015567B2 (en) * 2002-10-08 2011-09-06 Netlogic Microsystems, Inc. Advanced processor with mechanism for packet distribution at high line rate
US20050033889A1 (en) * 2002-10-08 2005-02-10 Hass David T. Advanced processor with interrupt delivery mechanism for multi-threaded multi-CPU system on a chip
US7346757B2 (en) 2002-10-08 2008-03-18 Rmi Corporation Advanced processor translation lookaside buffer management in a multithreaded system
US7984268B2 (en) * 2002-10-08 2011-07-19 Netlogic Microsystems, Inc. Advanced processor scheduling in a multithreaded system
US7924828B2 (en) 2002-10-08 2011-04-12 Netlogic Microsystems, Inc. Advanced processor with mechanism for fast packet queuing operations
US9088474B2 (en) * 2002-10-08 2015-07-21 Broadcom Corporation Advanced processor with interfacing messaging network to a CPU
US8037224B2 (en) 2002-10-08 2011-10-11 Netlogic Microsystems, Inc. Delegating network processor operations to star topology serial bus interfaces
US7627721B2 (en) 2002-10-08 2009-12-01 Rmi Corporation Advanced processor with cache coherency
US7961723B2 (en) * 2002-10-08 2011-06-14 Netlogic Microsystems, Inc. Advanced processor with mechanism for enforcing ordering between information sent on two independent networks
US7334086B2 (en) 2002-10-08 2008-02-19 Rmi Corporation Advanced processor with system on a chip interconnect technology
US7039914B2 (en) 2003-03-07 2006-05-02 Cisco Technology, Inc. Message processing in network forwarding engine by tracking order of assigned thread in order group
JP2006524850A (ja) * 2003-04-04 2006-11-02 ペーアーツェーテー　イクスペーペー　テクノロジーズ　アクチエンゲゼルシャフト データ処理方法およびデータ処理装置
US7500239B2 (en) * 2003-05-23 2009-03-03 Intel Corporation Packet processing system
EP1634182A2 (de) * 2003-06-17 2006-03-15 PACT XPP Technologies AG Datenverarbeitungseinrichtung und verfahren
JP4432388B2 (ja) 2003-08-12 2010-03-17 株式会社日立製作所 入出力制御装置
US7421565B1 (en) 2003-08-18 2008-09-02 Cray Inc. Method and apparatus for indirectly addressed vector load-add -store across multi-processors
US8307194B1 (en) 2003-08-18 2012-11-06 Cray Inc. Relaxed memory consistency model
US7735088B1 (en) * 2003-08-18 2010-06-08 Cray Inc. Scheduling synchronization of programs running as streams on multiple processors
US7743223B2 (en) * 2003-08-18 2010-06-22 Cray Inc. Decoupling of write address from its associated write data in a store to a shared memory in a multiprocessor system
EP1676208A2 (de) * 2003-08-28 2006-07-05 PACT XPP Technologies AG Datenverarbeitungseinrichtung und verfahren
US7376952B2 (en) * 2003-09-15 2008-05-20 Intel Corporation Optimizing critical section microblocks by controlling thread execution
US20050096999A1 (en) * 2003-11-05 2005-05-05 Chicago Mercantile Exchange Trade engine processing of mass quote messages and resulting production of market data
US7213099B2 (en) * 2003-12-30 2007-05-01 Intel Corporation Method and apparatus utilizing non-uniformly distributed DRAM configurations and to detect in-range memory address matches
JP2005276165A (ja) * 2004-02-27 2005-10-06 Sony Corp 情報処理装置、ネットワークシステム状況呈示方法およびコンピュータプログラム
JP4586526B2 (ja) 2004-02-27 2010-11-24 ソニー株式会社 情報処理装置、情報処理方法、情報処理システムおよび情報処理用プログラム
US20060048156A1 (en) * 2004-04-02 2006-03-02 Lim Soon C Unified control store
US7418582B1 (en) 2004-05-13 2008-08-26 Sun Microsystems, Inc. Versatile register file design for a multi-threaded processor utilizing different modes and register windows
US7519796B1 (en) 2004-06-30 2009-04-14 Sun Microsystems, Inc. Efficient utilization of a store buffer using counters
US7330988B2 (en) * 2004-06-30 2008-02-12 Sun Microsystems, Inc. Method and apparatus for power throttling in a multi-thread processor
US7343474B1 (en) 2004-06-30 2008-03-11 Sun Microsystems, Inc. Minimal address state in a fine grain multithreaded processor
US7478225B1 (en) 2004-06-30 2009-01-13 Sun Microsystems, Inc. Apparatus and method to support pipelining of differing-latency instructions in a multithreaded processor
US8225034B1 (en) 2004-06-30 2012-07-17 Oracle America, Inc. Hybrid instruction buffer
US7178005B1 (en) 2004-06-30 2007-02-13 Sun Microsystems, Inc. Efficient implementation of timers in a multithreaded processor
US7353364B1 (en) 2004-06-30 2008-04-01 Sun Microsystems, Inc. Apparatus and method for sharing a functional unit execution resource among a plurality of functional units
US7509484B1 (en) 2004-06-30 2009-03-24 Sun Microsystems, Inc. Handling cache misses by selectively flushing the pipeline
US7747771B1 (en) 2004-06-30 2010-06-29 Oracle America, Inc. Register access protocol in a multihreaded multi-core processor
US7702887B1 (en) 2004-06-30 2010-04-20 Sun Microsystems, Inc. Performance instrumentation in a fine grain multithreaded multicore processor
US8095778B1 (en) 2004-06-30 2012-01-10 Open Computing Trust I & II Method and system for sharing functional units of a multithreaded processor
US7533248B1 (en) 2004-06-30 2009-05-12 Sun Microsystems, Inc. Multithreaded processor including a functional unit shared between multiple requestors and arbitration therefor
US7216216B1 (en) 2004-06-30 2007-05-08 Sun Microsystems, Inc. Register window management using first pipeline to change current window and second pipeline to read operand from old window and write operand to new window
US7401206B2 (en) * 2004-06-30 2008-07-15 Sun Microsystems, Inc. Apparatus and method for fine-grained multithreading in a multipipelined processor core
US7290116B1 (en) 2004-06-30 2007-10-30 Sun Microsystems, Inc. Level 2 cache index hashing to avoid hot spots
US7366829B1 (en) 2004-06-30 2008-04-29 Sun Microsystems, Inc. TLB tag parity checking without CAM read
US7543132B1 (en) 2004-06-30 2009-06-02 Sun Microsystems, Inc. Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes
US7426630B1 (en) 2004-06-30 2008-09-16 Sun Microsystems, Inc. Arbitration of window swap operations
US7370243B1 (en) 2004-06-30 2008-05-06 Sun Microsystems, Inc. Precise error handling in a fine grain multithreaded multicore processor
US7676655B2 (en) * 2004-06-30 2010-03-09 Sun Microsystems, Inc. Single bit control of threads in a multithreaded multicore processor
US7774393B1 (en) 2004-06-30 2010-08-10 Oracle America, Inc. Apparatus and method for integer to floating-point format conversion
US7861063B1 (en) 2004-06-30 2010-12-28 Oracle America, Inc. Delay slot handling in a processor
US7383403B1 (en) 2004-06-30 2008-06-03 Sun Microsystems, Inc. Concurrent bypass to instruction buffers in a fine grain multithreaded processor
US7373489B1 (en) 2004-06-30 2008-05-13 Sun Microsystems, Inc. Apparatus and method for floating-point exception prediction and recovery
US7437538B1 (en) 2004-06-30 2008-10-14 Sun Microsystems, Inc. Apparatus and method for reducing execution latency of floating point operations having special case operands
US20060009265A1 (en) * 2004-06-30 2006-01-12 Clapper Edward O Communication blackout feature
US7941642B1 (en) 2004-06-30 2011-05-10 Oracle America, Inc. Method for selecting between divide instructions associated with respective threads in a multi-threaded processor
US7890734B2 (en) * 2004-06-30 2011-02-15 Open Computing Trust I & II Mechanism for selecting instructions for execution in a multithreaded processor
US7185178B1 (en) 2004-06-30 2007-02-27 Sun Microsystems, Inc. Fetch speculation in a multithreaded processor
US7434000B1 (en) 2004-06-30 2008-10-07 Sun Microsystems, Inc. Handling duplicate cache misses in a multithreaded/multi-core processor
US7523330B2 (en) * 2004-06-30 2009-04-21 Sun Microsystems, Inc. Thread-based clock enabling in a multi-threaded processor
US7571284B1 (en) 2004-06-30 2009-08-04 Sun Microsystems, Inc. Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor
US7890735B2 (en) * 2004-08-30 2011-02-15 Texas Instruments Incorporated Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture
GB0420442D0 (en) * 2004-09-14 2004-10-20 Ignios Ltd Debug in a multicore architecture
US9038070B2 (en) 2004-09-14 2015-05-19 Synopsys, Inc. Debug in a multicore architecture
US7277990B2 (en) 2004-09-30 2007-10-02 Sanjeev Jain Method and apparatus providing efficient queue descriptor memory access
US20060067348A1 (en) * 2004-09-30 2006-03-30 Sanjeev Jain System and method for efficient memory access of queue control data structures
US7765547B2 (en) * 2004-11-24 2010-07-27 Maxim Integrated Products, Inc. Hardware multithreading systems with state registers having thread profiling data
US8037250B1 (en) 2004-12-09 2011-10-11 Oracle America, Inc. Arbitrating cache misses in a multithreaded/multi-core processor
US8756605B2 (en) * 2004-12-17 2014-06-17 Oracle America, Inc. Method and apparatus for scheduling multiple threads for execution in a shared microprocessor pipeline
US7555630B2 (en) 2004-12-21 2009-06-30 Intel Corporation Method and apparatus to provide efficient communication between multi-threaded processing elements in a processor unit
US7418543B2 (en) 2004-12-21 2008-08-26 Intel Corporation Processor having content addressable memory with command ordering
US20060140203A1 (en) * 2004-12-28 2006-06-29 Sanjeev Jain System and method for packet queuing
US7467256B2 (en) * 2004-12-28 2008-12-16 Intel Corporation Processor having content addressable memory for block-based queue structures
US8279886B2 (en) * 2004-12-30 2012-10-02 Intel Corporation Dataport and methods thereof
US7480781B2 (en) * 2004-12-30 2009-01-20 Intel Corporation Apparatus and method to merge and align data from distributed memory controllers
US7703094B2 (en) * 2004-12-30 2010-04-20 Intel Corporation Adaptive and dynamic filtering of threaded programs
US7477641B2 (en) * 2004-12-30 2009-01-13 Intel Corporation Providing access to data shared by packet processing threads
US7430643B2 (en) * 2004-12-30 2008-09-30 Sun Microsystems, Inc. Multiple contexts for efficient use of translation lookaside buffer
JP2008530642A (ja) * 2005-02-07 2008-08-07 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト 低レイテンシーの大量並列データ処理装置
US7443878B2 (en) * 2005-04-04 2008-10-28 Sun Microsystems, Inc. System for scaling by parallelizing network workload
US7992144B1 (en) 2005-04-04 2011-08-02 Oracle America, Inc. Method and apparatus for separating and isolating control of processing entities in a network interface
US7529245B1 (en) 2005-04-04 2009-05-05 Sun Microsystems, Inc. Reorder mechanism for use in a relaxed order input/output system
US7415035B1 (en) 2005-04-04 2008-08-19 Sun Microsystems, Inc. Device driver access method into a virtualized network interface
US7779164B2 (en) * 2005-04-04 2010-08-17 Oracle America, Inc. Asymmetrical data processing partition
US7987306B2 (en) * 2005-04-04 2011-07-26 Oracle America, Inc. Hiding system latencies in a throughput networking system
US7865624B1 (en) 2005-04-04 2011-01-04 Oracle America, Inc. Lookup mechanism based on link layer semantics
US7415034B2 (en) * 2005-04-04 2008-08-19 Sun Microsystems, Inc. Virtualized partitionable shared network interface
US7664127B1 (en) 2005-04-05 2010-02-16 Sun Microsystems, Inc. Method for resolving mutex contention in a network system
US7889734B1 (en) 2005-04-05 2011-02-15 Oracle America, Inc. Method and apparatus for arbitrarily mapping functions to preassigned processing entities in a network system
US8510491B1 (en) 2005-04-05 2013-08-13 Oracle America, Inc. Method and apparatus for efficient interrupt event notification for a scalable input/output device
US8762595B1 (en) 2005-04-05 2014-06-24 Oracle America, Inc. Method for sharing interfaces among multiple domain environments with enhanced hooks for exclusiveness
US7353360B1 (en) 2005-04-05 2008-04-01 Sun Microsystems, Inc. Method for maximizing page locality
US7567567B2 (en) * 2005-04-05 2009-07-28 Sun Microsystems, Inc. Network system including packet classification for partitioned resources
US7843926B1 (en) 2005-04-05 2010-11-30 Oracle America, Inc. System for providing virtualization of network interfaces at various layers
US20060236011A1 (en) * 2005-04-15 2006-10-19 Charles Narad Ring management
US7924858B2 (en) * 2005-05-04 2011-04-12 Arm Limited Use of a data engine within a data processing apparatus
US7630388B2 (en) * 2005-05-04 2009-12-08 Arm Limited Software defined FIFO memory for storing a set of data from a stream of source data
US7920584B2 (en) * 2005-05-04 2011-04-05 Arm Limited Data processing system
US20070044103A1 (en) * 2005-07-25 2007-02-22 Mark Rosenbluth Inter-thread communication of lock protected data
US7853951B2 (en) * 2005-07-25 2010-12-14 Intel Corporation Lock sequencing to reorder and grant lock requests from multiple program threads
US20070124728A1 (en) * 2005-11-28 2007-05-31 Mark Rosenbluth Passing work between threads
US20070157030A1 (en) * 2005-12-30 2007-07-05 Feghali Wajdi K Cryptographic system component
US8250503B2 (en) * 2006-01-18 2012-08-21 Martin Vorbach Hardware definition method including determining whether to implement a function as hardware or software
US20070192766A1 (en) * 2006-02-13 2007-08-16 Ketan Padalia Apparatus and methods for parallelizing integrated circuit computer-aided design software
US20070245074A1 (en) * 2006-03-30 2007-10-18 Rosenbluth Mark B Ring with on-chip buffer for efficient message passing
US20080004876A1 (en) * 2006-06-30 2008-01-03 Chuang He Non-enrolled continuous dictation
US7711807B2 (en) * 2006-07-27 2010-05-04 Intel Corporation Selective filtering of exception data units
US20080140762A1 (en) * 2006-10-05 2008-06-12 Holt John M Job scheduling amongst multiple computers
US9794378B2 (en) 2006-11-08 2017-10-17 Standard Microsystems Corporation Network traffic controller (NTC)
US7926058B2 (en) 2007-02-06 2011-04-12 Mba Sciences, Inc. Resource tracking method and apparatus
US8898438B2 (en) 2007-03-14 2014-11-25 XMOS Ltd. Processor architecture for use in scheduling threads in response to communication activity
US7680909B2 (en) * 2007-03-21 2010-03-16 Ittiam Systems (P) Ltd. Method for configuration of a processing unit
US8386254B2 (en) * 2007-05-04 2013-02-26 Nuance Communications, Inc. Multi-class constrained maximum likelihood linear regression
US7958333B2 (en) * 2007-05-30 2011-06-07 XMOS Ltd. Processor with memory access stage adapted to fetch an instruction of a thread when no memory access operation is detected
US8059650B2 (en) * 2007-10-31 2011-11-15 Aruba Networks, Inc. Hardware based parallel processing cores with multiple threads and multiple pipeline stages
US20090109967A1 (en) * 2007-10-31 2009-04-30 Anirban Banerjee Method and system for remotely configuring an ethernet switch using ethernet packets
US7926013B2 (en) * 2007-12-31 2011-04-12 Intel Corporation Validating continuous signal phase matching in high-speed nets routed as differential pairs
US9063778B2 (en) * 2008-01-09 2015-06-23 Microsoft Technology Licensing, Llc Fair stateless model checking
US9596324B2 (en) * 2008-02-08 2017-03-14 Broadcom Corporation System and method for parsing and allocating a plurality of packets to processor core threads
CN101237346B (zh) * 2008-02-29 2012-01-11 中兴通讯股份有限公司 网络处理器及网络处理器的读写串口的方法
US20100115494A1 (en) * 2008-11-03 2010-05-06 Gorton Jr Richard C System for dynamic program profiling
US8024719B2 (en) 2008-11-03 2011-09-20 Advanced Micro Devices, Inc. Bounded hash table sorting in a dynamic program profiling system
US8478948B2 (en) * 2008-12-04 2013-07-02 Oracle America, Inc. Method and system for efficient tracing and profiling of memory accesses during program execution
US8667253B2 (en) 2010-08-04 2014-03-04 International Business Machines Corporation Initiating assist thread upon asynchronous event for processing simultaneously with controlling thread and updating its running status in status register
US8713290B2 (en) * 2010-09-20 2014-04-29 International Business Machines Corporation Scaleable status tracking of multiple assist hardware threads
US8793474B2 (en) 2010-09-20 2014-07-29 International Business Machines Corporation Obtaining and releasing hardware threads without hypervisor involvement
US8732711B2 (en) * 2010-09-24 2014-05-20 Nvidia Corporation Two-level scheduler for multi-threaded processing
US8634415B2 (en) 2011-02-16 2014-01-21 Oracle International Corporation Method and system for routing network traffic for a blade server
US9858241B2 (en) * 2013-11-05 2018-01-02 Oracle International Corporation System and method for supporting optimized buffer utilization for packet processing in a networking device
GB2495959A (en) 2011-10-26 2013-05-01 Imagination Tech Ltd Multi-threaded memory access processor
US8984183B2 (en) 2011-12-16 2015-03-17 Nvidia Corporation Signaling, ordering, and execution of dynamically generated tasks in a processing system
US8625422B1 (en) * 2012-12-20 2014-01-07 Unbound Networks Parallel processing using multi-core processor
US9563561B2 (en) * 2013-06-25 2017-02-07 Intel Corporation Initiation of cache flushes and invalidations on graphics processors
US9489327B2 (en) 2013-11-05 2016-11-08 Oracle International Corporation System and method for supporting an efficient packet processing model in a network environment
WO2015069408A1 (en) * 2013-11-05 2015-05-14 Oracle International Corporation System and method for supporting efficient packet processing model and optimized buffer utilization for packet processing in a network environment
CN103955445B (zh) 2014-04-30 2017-04-05 华为技术有限公司 一种数据处理方法、处理器及数据处理设备
CN104899006B (zh) * 2015-05-25 2018-03-30 中孚信息股份有限公司 一种多系统平台的多进程并行处理方法
CN105183553A (zh) * 2015-10-31 2015-12-23 山东智洋电气股份有限公司 软总线程序并发资源分配方法
US10706101B2 (en) 2016-04-14 2020-07-07 Advanced Micro Devices, Inc. Bucketized hash tables with remap entries
US10838656B2 (en) 2016-12-20 2020-11-17 Mediatek Inc. Parallel memory access to on-chip memory containing regions of different addressing schemes by threads executed on parallel processing units
CN111459630B (zh) * 2020-03-24 2023-12-08 华东计算技术研究所（中国电子科技集团公司第三十二研究所） 采用硬件多线程机制的网络处理器

Family Cites Families (165)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3373408A (en) * 1965-04-16 1968-03-12 Rca Corp Computer capable of switching between programs without storage and retrieval of the contents of operation registers
US3478322A (en) 1967-05-23 1969-11-11 Ibm Data processor employing electronically changeable control storage
BE795789A (fr) * 1972-03-08 1973-06-18 Burroughs Corp Microprogramme comportant une micro-instruction de recouvrement
IT986411B (it) * 1973-06-05 1975-01-30 Olivetti E C Spa Sistema per trasferire il control lo delle elaborazioni da un primo livello prioritario ad un secondo livello prioritario
US4016548A (en) 1975-04-11 1977-04-05 Sperry Rand Corporation Communication multiplexer module
CH584488A5 (de) 1975-05-05 1977-01-31 Ibm
US4075691A (en) 1975-11-06 1978-02-21 Bunker Ramo Corporation Communication control unit
US4130890A (en) 1977-06-08 1978-12-19 Itt Industries, Inc. Integrated DDC memory with bitwise erase
JPS56164464A (en) * 1980-05-21 1981-12-17 Tatsuo Nogi Parallel processing computer
US4400770A (en) * 1980-11-10 1983-08-23 International Business Machines Corporation Cache synonym detection and handling means
CA1179069A (en) * 1981-04-10 1984-12-04 Yasushi Fukunaga Data transmission apparatus for a multiprocessor system
US4831358A (en) 1982-12-21 1989-05-16 Texas Instruments Incorporated Communications system employing control line minimization
JPS6031648A (ja) * 1983-07-29 1985-02-18 Sharp Corp マルチ・タスク制御方法
US4745544A (en) * 1985-12-12 1988-05-17 Texas Instruments Incorporated Master/slave sequencing processor with forced I/O
US4788640A (en) 1986-01-17 1988-11-29 Intel Corporation Priority logic system
US5297260A (en) 1986-03-12 1994-03-22 Hitachi, Ltd. Processor having a plurality of CPUS with one CPU being normally connected to common bus
US5142683A (en) 1987-03-09 1992-08-25 Unisys Corporation Intercomputer communication control apparatus and method
US4866664A (en) 1987-03-09 1989-09-12 Unisys Corporation Intercomputer communication control apparatus & method
US5115507A (en) 1987-12-23 1992-05-19 U.S. Philips Corp. System for management of the priorities of access to a memory and its application
FR2625340B1 (fr) 1987-12-23 1990-05-04 Labo Electronique Physique Systeme graphique avec controleur graphique et controleur de dram
DE68913629T2 (de) 1988-03-14 1994-06-16 Unisys Corp Satzverriegelungsprozessor für vielfachverarbeitungsdatensystem.
US5155854A (en) 1989-02-03 1992-10-13 Digital Equipment Corporation System for arbitrating communication requests using multi-pass control unit based on availability of system resources
US5155831A (en) 1989-04-24 1992-10-13 International Business Machines Corporation Data processing system with fast queue store interposed between store-through caches and a main memory
US5168555A (en) 1989-09-06 1992-12-01 Unisys Corporation Initial program load control
US5263169A (en) 1989-11-03 1993-11-16 Zoran Corporation Bus arbitration and resource management for concurrent vector signal processor architecture
DE3942977A1 (de) 1989-12-23 1991-06-27 Standard Elektrik Lorenz Ag Verfahren zum wiederherstellen der richtigen zellfolge, insbesondere in einer atm-vermittlungsstelle, sowie ausgangseinheit hierfuer
US5179702A (en) * 1989-12-29 1993-01-12 Supercomputer Systems Limited Partnership System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
DE69132495T2 (de) * 1990-03-16 2001-06-13 Texas Instruments Inc., Dallas Verteilter Verarbeitungsspeicher
US5390329A (en) * 1990-06-11 1995-02-14 Cray Research, Inc. Responding to service requests using minimal system-side context in a multiprocessor environment
US5193167A (en) * 1990-06-29 1993-03-09 Digital Equipment Corporation Ensuring data integrity by locked-load and conditional-store operations in a multiprocessor system
US5404482A (en) * 1990-06-29 1995-04-04 Digital Equipment Corporation Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills
US5432918A (en) * 1990-06-29 1995-07-11 Digital Equipment Corporation Method and apparatus for ordering read and write operations using conflict bits in a write queue
US5347648A (en) 1990-06-29 1994-09-13 Digital Equipment Corporation Ensuring write ordering under writeback cache error conditions
AU630299B2 (en) 1990-07-10 1992-10-22 Fujitsu Limited A data gathering/scattering system in a parallel computer
US5367678A (en) 1990-12-06 1994-11-22 The Regents Of The University Of California Multiprocessor system having statically determining resource allocation schedule at compile time and the using of static schedule with processor signals to control the execution time dynamically
KR960001273B1 (ko) * 1991-04-30 1996-01-25 가부시키가이샤 도시바 단일칩 마이크로컴퓨터
US5255239A (en) 1991-08-13 1993-10-19 Cypress Semiconductor Corporation Bidirectional first-in-first-out memory device with transparent and user-testable capabilities
US5623489A (en) * 1991-09-26 1997-04-22 Ipc Information Systems, Inc. Channel allocation system for distributed digital switching network
US5392412A (en) * 1991-10-03 1995-02-21 Standard Microsystems Corporation Data communication controller for use with a single-port data packet buffer
GB2260429B (en) * 1991-10-11 1995-05-24 Intel Corp Versatile cache memory
US5392391A (en) * 1991-10-18 1995-02-21 Lsi Logic Corporation High performance graphics applications controller
US5557766A (en) 1991-10-21 1996-09-17 Kabushiki Kaisha Toshiba High-speed processor for handling multiple interrupts utilizing an exclusive-use bus and current and previous bank pointers to specify a return bank
US5452437A (en) 1991-11-18 1995-09-19 Motorola, Inc. Methods of debugging multiprocessor system
US5442797A (en) * 1991-12-04 1995-08-15 Casavant; Thomas L. Latency tolerant risc-based multiple processor with event driven locality managers resulting from variable tagging
JP2823767B2 (ja) * 1992-02-03 1998-11-11 松下電器産業株式会社 レジスタファイル
US5459842A (en) 1992-06-26 1995-10-17 International Business Machines Corporation System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory
DE4223600C2 (de) 1992-07-17 1994-10-13 Ibm Mehrprozessor-Computersystem und Verfahren zum Übertragen von Steuerinformationen und Dateninformation zwischen wenigstens zwei Prozessoreinheiten eines Computersystems
US5404484A (en) * 1992-09-16 1995-04-04 Hewlett-Packard Company Cache system for reducing memory latency times
ATE188559T1 (de) * 1992-12-23 2000-01-15 Centre Electron Horloger Multi-tasking-steuerungsgerät mit geringem energieverbrauch
US5448702A (en) 1993-03-02 1995-09-05 International Business Machines Corporation Adapters with descriptor queue management capability
DE69429204T2 (de) * 1993-03-26 2002-07-25 Cabletron Systems Inc Ablaufssteuerungsverfahren und -gerät für ein Kommunikationsnetzwerk
US6311286B1 (en) * 1993-04-30 2001-10-30 Nec Corporation Symmetric multiprocessing system with unified environment and distributed system functions
CA2122182A1 (en) * 1993-05-20 1994-11-21 Rene Leblanc Method for rapid prototyping of programming problems
JPH0740746A (ja) * 1993-07-29 1995-02-10 Aisin Seiki Co Ltd 車両用サンルーフ装置のチエツク機構
CA2107299C (en) 1993-09-29 1997-02-25 Mehrad Yasrebi High performance machine for switched communications in a heterogenous data processing network gateway
US5446736A (en) * 1993-10-07 1995-08-29 Ast Research, Inc. Method and apparatus for connecting a node to a wireless network using a standard protocol
US5450351A (en) 1993-11-19 1995-09-12 International Business Machines Corporation Content addressable memory implementation with random access memory
US5740402A (en) 1993-12-15 1998-04-14 Silicon Graphics, Inc. Conflict resolution in interleaved memory systems with multiple parallel accesses
US5490204A (en) * 1994-03-01 1996-02-06 Safco Corporation Automated quality assessment system for cellular networks
US5835755A (en) 1994-04-04 1998-11-10 At&T Global Information Solutions Company Multi-processor computer system for operating parallel client/server database processes
JP3547482B2 (ja) * 1994-04-15 2004-07-28 株式会社日立製作所 情報処理装置
US5542088A (en) * 1994-04-29 1996-07-30 Intergraph Corporation Method and apparatus for enabling control of task execution
US5721870A (en) * 1994-05-25 1998-02-24 Nec Corporation Lock control for a shared main storage data processing system
US5544236A (en) 1994-06-10 1996-08-06 At&T Corp. Access to unsubscribed features
US5574922A (en) 1994-06-17 1996-11-12 Apple Computer, Inc. Processor with sequences of processor instructions for locked memory updates
US5781774A (en) * 1994-06-29 1998-07-14 Intel Corporation Processor having operating modes for an upgradeable multiprocessor computer system
JP3810449B2 (ja) * 1994-07-20 2006-08-16 富士通株式会社 キュー装置
US5568476A (en) 1994-10-26 1996-10-22 3Com Corporation Method and apparatus for avoiding packet loss on a CSMA/CD-type local area network using receive-sense-based jam signal
JP3169779B2 (ja) * 1994-12-19 2001-05-28 日本電気株式会社 マルチスレッドプロセッサ
US5550816A (en) 1994-12-29 1996-08-27 Storage Technology Corporation Method and apparatus for virtual switching
US5784712A (en) * 1995-03-01 1998-07-21 Unisys Corporation Method and apparatus for locally generating addressing information for a memory access
US5701434A (en) 1995-03-16 1997-12-23 Hitachi, Ltd. Interleave memory controller with a common access queue
US5649157A (en) * 1995-03-30 1997-07-15 Hewlett-Packard Co. Memory controller with priority queues
US5886992A (en) * 1995-04-14 1999-03-23 Valtion Teknillinen Tutkimuskeskus Frame synchronized ring system and method
US5758184A (en) * 1995-04-24 1998-05-26 Microsoft Corporation System for performing asynchronous file operations requested by runnable threads by processing completion messages with different queue thread and checking for completion by runnable threads
US5592622A (en) * 1995-05-10 1997-01-07 3Com Corporation Network intermediate system with message passing architecture
JPH08320797A (ja) * 1995-05-24 1996-12-03 Fuji Xerox Co Ltd プログラム制御システム
US5828746A (en) 1995-06-07 1998-10-27 Lucent Technologies Inc. Telecommunications network
US5828863A (en) 1995-06-09 1998-10-27 Canon Information Systems, Inc. Interface device connected between a LAN and a printer for outputting formatted debug information about the printer to the printer
US5613071A (en) * 1995-07-14 1997-03-18 Intel Corporation Method and apparatus for providing remote memory access in a distributed memory multiprocessor system
US5680641A (en) 1995-08-16 1997-10-21 Sharp Microelectronics Technology, Inc. Multiple register bank system for concurrent I/O operation in a CPU datapath
US5940612A (en) 1995-09-27 1999-08-17 International Business Machines Corporation System and method for queuing of tasks in a multiprocessing system
US5689566A (en) * 1995-10-24 1997-11-18 Nguyen; Minhtam C. Network with secure communications sessions
US5809530A (en) 1995-11-13 1998-09-15 Motorola, Inc. Method and apparatus for processing multiple cache misses using reload folding and store merging
KR0150072B1 (ko) 1995-11-30 1998-10-15 양승택 병렬처리 컴퓨터 시스템에서의 메모리 데이타 경로 제어장치
US5796413A (en) 1995-12-06 1998-08-18 Compaq Computer Corporation Graphics controller utilizing video memory to provide macro command capability and enhanched command buffering
US5940866A (en) 1995-12-13 1999-08-17 International Business Machines Corporation Information handling system having a local address queue for local storage of command blocks transferred from a host processing side
US5850530A (en) 1995-12-18 1998-12-15 International Business Machines Corporation Method and apparatus for improving bus efficiency by enabling arbitration based upon availability of completion data
US5699537A (en) 1995-12-22 1997-12-16 Intel Corporation Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions
ATE191819T1 (de) * 1995-12-29 2000-04-15 Tixi Com Gmbh Verfahren und mikrocomputersystem zur automatischen, sicheren und direkten datenübertragung
US6201807B1 (en) * 1996-02-27 2001-03-13 Lucent Technologies Real-time hardware method and apparatus for reducing queue processing
US5761507A (en) * 1996-03-05 1998-06-02 International Business Machines Corporation Client/server architecture supporting concurrent servers within a server with a transaction manager providing server/connection decoupling
US5764915A (en) 1996-03-08 1998-06-09 International Business Machines Corporation Object-oriented communication interface for network protocol access using the selected newly created protocol interface object and newly created protocol layer objects in the protocol stack
US5809235A (en) 1996-03-08 1998-09-15 International Business Machines Corporation Object oriented network event management framework
US5784649A (en) * 1996-03-13 1998-07-21 Diamond Multimedia Systems, Inc. Multi-threaded FIFO pool buffer and bus transfer control system
US5797043A (en) 1996-03-13 1998-08-18 Diamond Multimedia Systems, Inc. System for managing the transfer of data between FIFOs within pool memory and peripherals being programmable with identifications of the FIFOs
US6199133B1 (en) * 1996-03-29 2001-03-06 Compaq Computer Corporation Management communication bus for networking devices
KR100219597B1 (ko) * 1996-03-30 1999-09-01 윤종용 씨디-롬 드라이브에서의 큐잉 제어 방법
GB2311882B (en) * 1996-04-04 2000-08-09 Videologic Ltd A data processing management system
JP3541335B2 (ja) * 1996-06-28 2004-07-07 富士通株式会社 情報処理装置及び分散処理制御方法
US5937187A (en) 1996-07-01 1999-08-10 Sun Microsystems, Inc. Method and apparatus for execution and preemption control of computer process entities
JPH1049381A (ja) * 1996-07-04 1998-02-20 Internatl Business Mach Corp <Ibm> 複数のデータ処理要求の処理方法及び処理システム、プログラムの実行方法及びシステム
US6023742A (en) * 1996-07-18 2000-02-08 University Of Washington Reconfigurable computing architecture for providing pipelined data paths
US5745913A (en) * 1996-08-05 1998-04-28 Exponential Technology, Inc. Multi-processor DRAM controller that prioritizes row-miss requests to stale banks
US5928736A (en) * 1996-09-09 1999-07-27 Raytheon Company Composite structure having integrated aperture and method for its preparation
US5812868A (en) 1996-09-16 1998-09-22 Motorola Inc. Method and apparatus for selecting a register file in a data processing system
US6072781A (en) * 1996-10-22 2000-06-06 International Business Machines Corporation Multi-tasking adapter for parallel network applications
US5860158A (en) * 1996-11-15 1999-01-12 Samsung Electronics Company, Ltd. Cache control unit with a cache request transaction-oriented protocol
US5905876A (en) * 1996-12-16 1999-05-18 Intel Corporation Queue ordering for memory and I/O transactions in a multiple concurrent transaction computer system
US6212542B1 (en) * 1996-12-16 2001-04-03 International Business Machines Corporation Method and system for executing a program within a multiscalar processor by processing linked thread descriptors
US5854922A (en) 1997-01-16 1998-12-29 Ford Motor Company Micro-sequencer apparatus and method of combination state machine and instruction memory
US6256115B1 (en) * 1997-02-21 2001-07-03 Worldquest Network, Inc. Facsimile network
US6269391B1 (en) * 1997-02-24 2001-07-31 Novell, Inc. Multi-processor scheduling kernel
US5742587A (en) * 1997-02-28 1998-04-21 Lanart Corporation Load balancing port switching hub
US5905889A (en) * 1997-03-20 1999-05-18 International Business Machines Corporation Resource management system using next available integer from an integer pool and returning the integer thereto as the next available integer upon completion of use
AU6586898A (en) * 1997-03-21 1998-10-20 University Of Maryland Spawn-join instruction set architecture for providing explicit multithreading
US5918235A (en) * 1997-04-04 1999-06-29 Hewlett-Packard Company Object surrogate with active computation and probablistic counter
US6535878B1 (en) * 1997-05-02 2003-03-18 Roxio, Inc. Method and system for providing on-line interactivity over a server-client network
US5983274A (en) * 1997-05-08 1999-11-09 Microsoft Corporation Creation and use of control information associated with packetized network data by protocol drivers and device drivers
US6182177B1 (en) * 1997-06-13 2001-01-30 Intel Corporation Method and apparatus for maintaining one or more queues of elements such as commands using one or more token queues
US6092158A (en) * 1997-06-13 2000-07-18 Intel Corporation Method and apparatus for arbitrating between command streams
US6067585A (en) * 1997-06-23 2000-05-23 Compaq Computer Corporation Adaptive interface controller that can operate with segments of different protocol and transmission rates in a single integrated device
US5870597A (en) * 1997-06-25 1999-02-09 Sun Microsystems, Inc. Method for speculative calculation of physical register addresses in an out of order processor
US6393483B1 (en) * 1997-06-30 2002-05-21 Adaptec, Inc. Method and apparatus for network interface card load balancing and port aggregation
US5887134A (en) * 1997-06-30 1999-03-23 Sun Microsystems System and method for preserving message order while employing both programmed I/O and DMA operations
KR100216371B1 (ko) * 1997-06-30 1999-08-16 윤종용 고장 감내형 대용량 ATM 스위치 및 2nXn 다중화스위치에서의 셀프라우팅 방법
US6247025B1 (en) * 1997-07-17 2001-06-12 International Business Machines Corporation Locking and unlocking mechanism for controlling concurrent access to objects
US6170051B1 (en) * 1997-08-01 2001-01-02 Micron Technology, Inc. Apparatus and method for program level parallelism in a VLIW processor
US6014729A (en) * 1997-09-29 2000-01-11 Firstpass, Inc. Shared memory arbitration apparatus and method
US6085294A (en) * 1997-10-24 2000-07-04 Compaq Computer Corporation Distributed data dependency stall mechanism
US6061710A (en) * 1997-10-29 2000-05-09 International Business Machines Corporation Multithreaded processor incorporating a thread latch register for interrupt service new pending threads
US5915123A (en) * 1997-10-31 1999-06-22 Silicon Spice Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements
EP0918280B1 (de) * 1997-11-19 2004-03-24 IMEC vzw System und Verfahren zur Kontextumschaltung über vorbestimmte Unterbrechungspunkte
US6360262B1 (en) * 1997-11-24 2002-03-19 International Business Machines Corporation Mapping web server objects to TCP/IP ports
US6070231A (en) * 1997-12-02 2000-05-30 Intel Corporation Method and apparatus for processing memory requests that require coherency transactions
JPH11203860A (ja) * 1998-01-07 1999-07-30 Nec Corp 半導体記憶装置
US6415338B1 (en) * 1998-02-11 2002-07-02 Globespan, Inc. System for writing a data value at a starting address to a number of consecutive locations equal to a segment length identifier
US6223238B1 (en) * 1998-03-31 2001-04-24 Micron Electronics, Inc. Method of peer-to-peer mastering over a computer bus
US6079008A (en) * 1998-04-03 2000-06-20 Patton Electronics Co. Multiple thread multiple data predictive coded parallel processing system and method
KR100280460B1 (ko) * 1998-04-08 2001-02-01 김영환 데이터 처리 장치 및 이의 복수의 스레드 처리 방법
US6092127A (en) * 1998-05-15 2000-07-18 Hewlett-Packard Company Dynamic allocation and reallocation of buffers in links of chained DMA operations by receiving notification of buffer full and maintaining a queue of buffers available
US6373848B1 (en) * 1998-07-28 2002-04-16 International Business Machines Corporation Architecture for a multi-port adapter with a single media access control (MAC)
US6073215A (en) * 1998-08-03 2000-06-06 Motorola, Inc. Data processing system having a data prefetch mechanism and method therefor
US6393026B1 (en) * 1998-09-17 2002-05-21 Nortel Networks Limited Data packet processing system and method for a router
US6347344B1 (en) * 1998-10-14 2002-02-12 Hitachi, Ltd. Integrated multimedia system with local processor, data transfer switch, processing modules, fixed functional unit, data streamer, interface unit and multiplexer, all integrated on multimedia processor
US6366998B1 (en) * 1998-10-14 2002-04-02 Conexant Systems, Inc. Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model
US6212611B1 (en) * 1998-11-03 2001-04-03 Intel Corporation Method and apparatus for providing a pipelined memory controller
US6389449B1 (en) * 1998-12-16 2002-05-14 Clearwater Networks, Inc. Interstream control and communications for multi-streaming digital processors
US6338078B1 (en) * 1998-12-17 2002-01-08 International Business Machines Corporation System and method for sequencing packets for multiprocessor parallelization in a computer network system
US6466898B1 (en) * 1999-01-12 2002-10-15 Terence Chan Multithreaded, mixed hardware description languages logic simulation on engineering workstations
US6356692B1 (en) * 1999-02-04 2002-03-12 Hitachi, Ltd. Optical module, transmitter, receiver, optical switch, optical communication unit, add-and-drop multiplexing unit, and method for manufacturing the optical module
US6256713B1 (en) * 1999-04-29 2001-07-03 International Business Machines Corporation Bus optimization with read/write coherence including ordering responsive to collisions
US6427196B1 (en) * 1999-08-31 2002-07-30 Intel Corporation SRAM controller for parallel processor architecture including address and command queue and arbiter
US6529983B1 (en) * 1999-11-03 2003-03-04 Cisco Technology, Inc. Group and virtual locking mechanism for inter processor synchronization
US6532509B1 (en) * 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) * 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6560667B1 (en) * 1999-12-28 2003-05-06 Intel Corporation Handling contiguous memory references in a multi-queue system
US6324624B1 (en) * 1999-12-28 2001-11-27 Intel Corporation Read lock miss control and queue management
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
US6307789B1 (en) * 1999-12-28 2001-10-23 Intel Corporation Scratchpad memory
US6584522B1 (en) * 1999-12-30 2003-06-24 Intel Corporation Communication between processors
US6952824B1 (en) * 1999-12-30 2005-10-04 Intel Corporation Multi-threaded sequenced receive for fast network port stream of packets
US6944850B2 (en) * 2000-12-21 2005-09-13 Intel Corporation Hop method for stepping parallel hardware threads
US6671827B2 (en) * 2000-12-21 2003-12-30 Intel Corporation Journaling for parallel hardware threads in multithreaded processor
US6934951B2 (en) * 2002-01-17 2005-08-23 Intel Corporation Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section

Also Published As

Publication number Publication date
TW544629B (en) 2003-08-01
US6625654B1 (en) 2003-09-23
EP1242883B1 (de) 2006-09-13
WO2001048606A2 (en) 2001-07-05
HK1046050A1 (en) 2002-12-20
SG145543A1 (en) 2008-09-29
CN100351798C (zh) 2007-11-28
EP1242883A2 (de) 2002-09-25
US20040098496A1 (en) 2004-05-20
ATE339724T1 (de) 2006-10-15
US7111296B2 (en) 2006-09-19
WO2001048606A3 (en) 2002-07-11
US20020013861A1 (en) 2002-01-31
DE60030767T2 (de) 2007-11-08
CN1643499A (zh) 2005-07-20
AU4311601A (en) 2001-07-09

Similar Documents

Publication Publication Date Title
DE60030767D1 (de) Datenzuweisung zu threads in einem multi-threaded netzwerkprozessor
ATE269988T1 (de) Ausführung von mehreren fäden in einem parallelprozessor
HK1049716A1 (en) Parallel processor architecture.
HK1049899A1 (en) Sdram controller for parallel processor architecture
FI953204A0 (fi) Datamuistin jakaminen moniprosessorijärjestelmissä
WO2002047020A3 (en) Concurrent communication with multiple applications on a smart card
TW376475B (en) Memory access protection
SG155038A1 (en) A multi-threaded packet processing engine for stateful packet processing
CA2011807A1 (en) Data base processing system using multiprocessor system
ATE429674T1 (de) Cross partition teilung von zustandsinformation
CA2264232A1 (en) Systems and methods for providing dynamic data referencing in a generic data exchange environment
WO2003060715A3 (en) Value recycling facility for multithreaded computations
GB2416886B (en) Distributed computing
TW200713218A (en) Method for overwriting data in a memory device
DE69636663D1 (de) System und Verfahren zur Zugriffsverteilung von Mehrfachspeichermatrixen zwischen Mehrfachwirtrechnersystemen
MY122682A (en) System and method for performing context switching and rescheduling of a processor
ATE468562T1 (de) Virtualisierung von e/a-adapterressourcen
ATE534074T1 (de) Kontextwechselbefehl für multithread-prozessor
US7120749B2 (en) Cache mechanism
DE69422228D1 (de) Prozessorsystem, insbesondere für Bildverarbeitung mit einem Speicherbus von variabler Grösse
GB2365597B (en) Processing systems
TH53285A (th) ระบบการประมวลผลซอฟต์แวร์ในลักษณะคู่ขนาน
TH53285B (th) ระบบการประมวลผลซอฟต์แวร์ในลักษณะคู่ขนาน
TW268112B (en) Bank decoding by address ranging for memory bank

Legal Events

Date Code Title Description
8364 No opposition during term of opposition