ATE534074T1 - Kontextwechselbefehl für multithread-prozessor - Google Patents
Kontextwechselbefehl für multithread-prozessorInfo
- Publication number
- ATE534074T1 ATE534074T1 AT00959713T AT00959713T ATE534074T1 AT E534074 T1 ATE534074 T1 AT E534074T1 AT 00959713 T AT00959713 T AT 00959713T AT 00959713 T AT00959713 T AT 00959713T AT E534074 T1 ATE534074 T1 AT E534074T1
- Authority
- AT
- Austria
- Prior art keywords
- memory
- references
- processor
- change command
- context
- Prior art date
Links
- 230000006870 function Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/3009—Thread control instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Image Processing (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15196199P | 1999-09-01 | 1999-09-01 | |
PCT/US2000/023995 WO2001016703A1 (en) | 1999-09-01 | 2000-08-31 | Instruction for multithreaded parallel processor |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE534074T1 true ATE534074T1 (de) | 2011-12-15 |
Family
ID=35788084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT00959713T ATE534074T1 (de) | 1999-09-01 | 2000-08-31 | Kontextwechselbefehl für multithread-prozessor |
Country Status (2)
Country | Link |
---|---|
AT (1) | ATE534074T1 (de) |
WO (1) | WO2001016703A1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050108711A1 (en) * | 2003-11-13 | 2005-05-19 | Infineon Technologies North America Corporation | Machine instruction for enhanced control of multiple virtual processor systems |
US9367321B2 (en) * | 2007-03-14 | 2016-06-14 | Xmos Limited | Processor instruction set for controlling an event source to generate events used to schedule threads |
US8185722B2 (en) | 2007-03-14 | 2012-05-22 | XMOS Ltd. | Processor instruction set for controlling threads to respond to events |
PL3563235T3 (pl) | 2016-12-31 | 2023-03-13 | Intel Corporation | Systemy, sposoby i aparaty do obliczania heterogenicznego |
CN113986585B (zh) * | 2021-12-29 | 2022-04-01 | 深圳微品致远信息科技有限公司 | 报文处理方法、装置、计算机设备和存储介质 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220669A (en) * | 1988-02-10 | 1993-06-15 | International Business Machines Corporation | Linkage mechanism for program isolation |
US5428779A (en) * | 1992-11-09 | 1995-06-27 | Seiko Epson Corporation | System and method for supporting context switching within a multiprocessor system having functional blocks that generate state programs with coded register load instructions |
US6061711A (en) * | 1996-08-19 | 2000-05-09 | Samsung Electronics, Inc. | Efficient context saving and restoring in a multi-tasking computing system environment |
EP0863462B8 (de) | 1997-03-04 | 2010-07-28 | Panasonic Corporation | Zur effizienten Ausführung vieler asynchronen Ereignisaufgaben geeigneter Prozessor |
US5926646A (en) * | 1997-09-11 | 1999-07-20 | Advanced Micro Devices, Inc. | Context-dependent memory-mapped registers for transparent expansion of a register file |
US6115777A (en) * | 1998-04-21 | 2000-09-05 | Idea Corporation | LOADRS instruction and asynchronous context switch |
US6101599A (en) * | 1998-06-29 | 2000-08-08 | Cisco Technology, Inc. | System for context switching between processing elements in a pipeline of processing elements |
-
2000
- 2000-08-31 WO PCT/US2000/023995 patent/WO2001016703A1/en active Application Filing
- 2000-08-31 AT AT00959713T patent/ATE534074T1/de active
Also Published As
Publication number | Publication date |
---|---|
WO2001016703A1 (en) | 2001-03-08 |
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