DE60003235T2 - Cachespeicher zum bereitstellen von partiellen etiketten aus nicht-vorhergesagten wegen um die suche bei wegvorhersagefehlgriffen zu leiten - Google Patents

Cachespeicher zum bereitstellen von partiellen etiketten aus nicht-vorhergesagten wegen um die suche bei wegvorhersagefehlgriffen zu leiten Download PDF

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Publication number
DE60003235T2
DE60003235T2 DE60003235T DE60003235T DE60003235T2 DE 60003235 T2 DE60003235 T2 DE 60003235T2 DE 60003235 T DE60003235 T DE 60003235T DE 60003235 T DE60003235 T DE 60003235T DE 60003235 T2 DE60003235 T2 DE 60003235T2
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address
cache
path
route
partial
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Expired - Lifetime
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DE60003235T
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German (de)
English (en)
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DE60003235D1 (de
Inventor
B. James KELLER
R. Keith SCHAKEL
Puneet Sharma
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GlobalFoundries Inc
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Advanced Micro Devices Inc
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Publication of DE60003235D1 publication Critical patent/DE60003235D1/de
Publication of DE60003235T2 publication Critical patent/DE60003235T2/de
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Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/608—Details relating to cache mapping
    • G06F2212/6082—Way prediction in set-associative cache
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE60003235T 2000-01-03 2000-08-08 Cachespeicher zum bereitstellen von partiellen etiketten aus nicht-vorhergesagten wegen um die suche bei wegvorhersagefehlgriffen zu leiten Expired - Lifetime DE60003235T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US476577 2000-01-03
US09/476,577 US6687789B1 (en) 2000-01-03 2000-01-03 Cache which provides partial tags from non-predicted ways to direct search if way prediction misses
PCT/US2000/021756 WO2001050272A1 (en) 2000-01-03 2000-08-08 Cache which provides partial tags from non-predicted ways to direct search if way prediction misses

Publications (2)

Publication Number Publication Date
DE60003235D1 DE60003235D1 (de) 2003-07-10
DE60003235T2 true DE60003235T2 (de) 2004-04-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE60003235T Expired - Lifetime DE60003235T2 (de) 2000-01-03 2000-08-08 Cachespeicher zum bereitstellen von partiellen etiketten aus nicht-vorhergesagten wegen um die suche bei wegvorhersagefehlgriffen zu leiten

Country Status (7)

Country Link
US (1) US6687789B1 (enExample)
EP (1) EP1244970B1 (enExample)
JP (1) JP2003519835A (enExample)
KR (1) KR100747127B1 (enExample)
CN (1) CN1208726C (enExample)
DE (1) DE60003235T2 (enExample)
WO (1) WO2001050272A1 (enExample)

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US20040181626A1 (en) * 2003-03-13 2004-09-16 Pickett James K. Partial linearly tagged cache memory system
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US20040243767A1 (en) * 2003-06-02 2004-12-02 Cierniak Michal J. Method and apparatus for prefetching based upon type identifier tags
US7117290B2 (en) * 2003-09-03 2006-10-03 Advanced Micro Devices, Inc. MicroTLB and micro tag for reducing power in a processor
US20050050278A1 (en) * 2003-09-03 2005-03-03 Advanced Micro Devices, Inc. Low power way-predicted cache
US7085894B2 (en) * 2003-09-11 2006-08-01 International Business Machines Corporation Selectively accepting cache content
US6961276B2 (en) * 2003-09-17 2005-11-01 International Business Machines Corporation Random access memory having an adaptable latency
US7669009B2 (en) * 2004-09-23 2010-02-23 Intel Corporation Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches
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US7707387B2 (en) 2005-06-01 2010-04-27 Microsoft Corporation Conditional execution via content addressable memory and parallel computing execution model
US7793040B2 (en) * 2005-06-01 2010-09-07 Microsoft Corporation Content addressable memory architecture
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US8904111B2 (en) 2009-10-20 2014-12-02 The University Of Electro-Communications Cache memory with CAM and SRAM sub-tags and generation control
US8392665B2 (en) 2010-09-25 2013-03-05 Intel Corporation Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines
CN102193875B (zh) * 2011-04-26 2013-08-14 北京工业大学 多核下基于Cache划分的自适应路预测算法
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KR102354990B1 (ko) * 2014-09-17 2022-01-24 삼성전자주식회사 캐시 메모리 시스템 및 그 동작방법
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US10565122B2 (en) 2017-05-30 2020-02-18 Microsoft Technology Licensing, Llc Serial tag lookup with way-prediction
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Also Published As

Publication number Publication date
KR100747127B1 (ko) 2007-08-09
JP2003519835A (ja) 2003-06-24
EP1244970B1 (en) 2003-06-04
CN1415092A (zh) 2003-04-30
EP1244970A1 (en) 2002-10-02
US6687789B1 (en) 2004-02-03
WO2001050272A1 (en) 2001-07-12
DE60003235D1 (de) 2003-07-10
CN1208726C (zh) 2005-06-29
KR20020067596A (ko) 2002-08-22

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Owner name: GLOBALFOUNDRIES INC. MAPLES CORPORATE SERVICES, KY